| /linux/drivers/clk/meson/ |
| A D | vclk.c | 22 meson_parm_write(clk->map, &vclk->enable, 1); in meson_vclk_gate_enable()
25 meson_parm_write(clk->map, &vclk->reset, 1); in meson_vclk_gate_enable()
26 meson_parm_write(clk->map, &vclk->reset, 0); in meson_vclk_gate_enable()
36 meson_parm_write(clk->map, &vclk->enable, 0); in meson_vclk_gate_disable()
69 vclk->table, vclk->flags, vclk->div.width); in meson_vclk_div_recalc_rate()
78 return divider_determine_rate(hw, req, vclk->table, vclk->div.width, in meson_vclk_div_determine_rate()
79 vclk->flags); in meson_vclk_div_determine_rate()
89 ret = divider_get_val(rate, parent_rate, vclk->table, vclk->div.width, in meson_vclk_div_set_rate()
90 vclk->flags); in meson_vclk_div_set_rate()
94 meson_parm_write(clk->map, &vclk->div, ret); in meson_vclk_div_set_rate()
[all …]
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| A D | Makefile | 15 obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o
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| /linux/drivers/video/fbdev/via/ |
| A D | vt1636.c | 186 index = get_clk_range_index(plvds_setting_info->vclk); in viafb_vt1636_patch_skew_on_vt3324()
210 index = get_clk_range_index(plvds_setting_info->vclk); in viafb_vt1636_patch_skew_on_vt3327()
227 index = get_clk_range_index(plvds_setting_info->vclk); in viafb_vt1636_patch_skew_on_vt3364()
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| A D | chip.h | 141 u32 vclk; /*panel mode clock value */ member
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| /linux/drivers/gpu/drm/radeon/ |
| A D | rs780_dpm.c | 570 if ((new_ps->vclk == old_ps->vclk) && in rs780_set_uvd_clock_before_set_eng_clock()
577 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_before_set_eng_clock()
587 if ((new_ps->vclk == old_ps->vclk) && in rs780_set_uvd_clock_after_set_eng_clock()
594 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_after_set_eng_clock()
727 rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); in rs780_parse_pplib_non_clock_info()
730 rps->vclk = 0; in rs780_parse_pplib_non_clock_info()
735 if ((rps->vclk == 0) || (rps->dclk == 0)) { in rs780_parse_pplib_non_clock_info()
736 rps->vclk = RS780_DEFAULT_VCLK_FREQ; in rs780_parse_pplib_non_clock_info()
945 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rs780_dpm_print_power_state()
994 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rs780_dpm_debugfs_print_current_performance_level()
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| A D | trinity_dpm.c | 850 if ((rps->vclk == 0) && (rps->dclk == 0)) in trinity_uvd_clocks_zero()
862 if ((rps1->vclk == rps2->vclk) && in trinity_uvd_clocks_equal()
895 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in trinity_setup_uvd_clocks()
906 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in trinity_setup_uvd_clocks()
1410 if ((rps->vclk == pi->sys_info.uvd_clock_table_entries[i].vclk) && in trinity_get_uvd_clock_index()
1644 rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); in trinity_parse_pplib_non_clock_info()
1647 rps->vclk = 0; in trinity_parse_pplib_non_clock_info()
1887 pi->sys_info.uvd_clock_table_entries[i].vclk = in trinity_parse_sys_info_table()
1973 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in trinity_dpm_print_power_state()
1998 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in trinity_dpm_debugfs_print_current_performance_level()
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| /linux/Documentation/devicetree/bindings/media/ |
| A D | aspeed-video.txt | 13 - clock-names: "vclk" and "eclk"
29 clock-names = "vclk", "eclk";
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| /linux/drivers/media/platform/renesas/rzg2l-cru/ |
| A D | rzg2l-csi2.c | 111 struct clk *vclk; member
390 clk_disable_unprepare(csi2->vclk); in rzg2l_csi2_mipi_link_enable()
395 return clk_prepare_enable(csi2->vclk); in rzg2l_csi2_mipi_link_enable()
767 csi2->vclk = devm_clk_get(&pdev->dev, "video"); in rzg2l_csi2_probe()
768 if (IS_ERR(csi2->vclk)) in rzg2l_csi2_probe()
769 return dev_err_probe(&pdev->dev, PTR_ERR(csi2->vclk), in rzg2l_csi2_probe()
771 csi2->vclk_rate = clk_get_rate(csi2->vclk); in rzg2l_csi2_probe()
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| A D | rzg2l-core.c | 265 cru->vclk = devm_clk_get(&pdev->dev, "video"); in rzg2l_cru_probe()
266 if (IS_ERR(cru->vclk)) in rzg2l_cru_probe()
267 return dev_err_probe(&pdev->dev, PTR_ERR(cru->vclk), in rzg2l_cru_probe()
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| A D | rzg2l-cru.h | 106 struct clk *vclk; member
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| /linux/drivers/tty/serial/8250/ |
| A D | 8250_aspeed_vuart.c | 424 struct clk *vclk; in aspeed_vuart_probe() local
464 vclk = devm_clk_get_enabled(dev, NULL); in aspeed_vuart_probe()
465 if (IS_ERR(vclk)) { in aspeed_vuart_probe()
466 rc = dev_err_probe(dev, PTR_ERR(vclk), "clk or clock-frequency not defined\n"); in aspeed_vuart_probe()
470 port.port.uartclk = clk_get_rate(vclk); in aspeed_vuart_probe()
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| /linux/drivers/gpu/drm/exynos/ |
| A D | exynos7_drm_decon.c | 50 struct clk *vclk; member
147 clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->vclk), ideal_clk); in decon_calc_clkdiv()
723 ctx->vclk = devm_clk_get(dev, "decon0_vclk"); in decon_probe()
724 if (IS_ERR(ctx->vclk)) { in decon_probe()
726 ret = PTR_ERR(ctx->vclk); in decon_probe()
783 clk_disable_unprepare(ctx->vclk); in exynos7_decon_suspend()
817 ret = clk_prepare_enable(ctx->vclk); in exynos7_decon_resume()
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| /linux/drivers/gpu/drm/renesas/rz-du/ |
| A D | rzg2l_mipi_dsi.c | 41 struct clk *vclk; member
289 clk_set_rate(dsi->vclk, mode->clock * 1000); in rzg2l_mipi_dsi_startup()
722 dsi->vclk = devm_clk_get(dsi->dev, "vclk"); in rzg2l_mipi_dsi_probe()
723 if (IS_ERR(dsi->vclk)) in rzg2l_mipi_dsi_probe()
724 return PTR_ERR(dsi->vclk); in rzg2l_mipi_dsi_probe()
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| /linux/arch/arm64/boot/dts/renesas/ |
| A D | r9a07g043u.dtsi | 139 clock-names = "aclk", "pclk", "vclk";
151 clock-names = "aclk", "pclk", "vclk";
163 clock-names = "aclk", "pclk", "vclk";
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| /linux/Documentation/devicetree/bindings/display/ |
| A D | renesas,rzg2l-du.yaml | 44 - const: vclk
130 clock-names = "aclk", "pclk", "vclk";
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| A D | xylon,logicvc-display.yaml | 45 # vclk is required and must be provided as first item.
46 - const: vclk
228 clock-names = "vclk", "lvdsclk";
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| /linux/drivers/gpu/drm/logicvc/ |
| A D | logicvc_drm.h | 57 struct clk *vclk; member
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| /linux/drivers/video/fbdev/aty/ |
| A D | aty128fb.c | 426 u32 vclk; member
1365 u32 vclk; /* in .01 MHz */ in aty128_var_to_pll() local
1372 if (vclk > c.ppll_max) in aty128_var_to_pll()
1373 vclk = c.ppll_max; in aty128_var_to_pll()
1374 if (vclk * 12 < c.ppll_min) in aty128_var_to_pll()
1375 vclk = c.ppll_min/12; in aty128_var_to_pll()
1379 output_freq = post_dividers[i] * vclk; in aty128_var_to_pll()
1394 pll->vclk = vclk; in aty128_var_to_pll()
1398 pll->feedback_divider, vclk, output_freq, in aty128_var_to_pll()
1408 var->pixclock = 100000000 / pll->vclk; in aty128_pll_to_var()
[all …]
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| /linux/drivers/gpu/drm/nouveau/dispnv04/ |
| A D | arb.c | 252 nouveau_calc_arb(struct drm_device *dev, int vclk, int bpp, int *burst, int *lwm) in nouveau_calc_arb() argument
258 nv04_update_arb(dev, vclk, bpp, burst, lwm); in nouveau_calc_arb()
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| A D | renesas,dsi.yaml | 66 - const: vclk
156 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | smu8_hwmgr.c | 140 if (clock <= ptable->entries[i].vclk) in smu8_get_uvd_level()
148 if (clock >= ptable->entries[i].vclk) in smu8_get_uvd_level()
513 (i < uvd_table->count) ? uvd_table->entries[i].vclk : 0; in smu8_upload_pptable_to_smu()
600 clock = table->entries[level].vclk; in smu8_init_uvd_limit()
602 clock = table->entries[table->count - 1].vclk; in smu8_init_uvd_limit()
1438 smu8_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; in smu8_dpm_get_pp_table_entry()
1746 uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent; in smu8_read_sensor() local
1780 vclk = uvd_table->entries[uvd_index].vclk; in smu8_read_sensor()
1781 *((uint32_t *)value) = vclk; in smu8_read_sensor()
1916 ptable->entries[ptable->count - 1].vclk; in smu8_dpm_update_uvd_dpm()
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| A D | hwmgr_ppt.h | 60 uint32_t vclk; /* UVD V-clock */ member
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| /linux/Documentation/devicetree/bindings/display/samsung/ |
| A D | samsung,fimd.yaml | 119 samsung,invert-vclk:
185 samsung,invert-vclk;
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| /linux/drivers/media/platform/aspeed/ |
| A D | aspeed-video.c | 288 struct clk *vclk; member
665 clk_disable(video->vclk); in aspeed_video_off()
676 clk_enable(video->vclk); in aspeed_video_on()
2103 video->vclk = devm_clk_get(dev, "vclk"); in aspeed_video_init()
2104 if (IS_ERR(video->vclk)) { in aspeed_video_init()
2106 rc = PTR_ERR(video->vclk); in aspeed_video_init()
2110 rc = clk_prepare(video->vclk); in aspeed_video_init()
2137 clk_unprepare(video->vclk); in aspeed_video_init()
2189 clk_unprepare(video->vclk); in aspeed_video_probe()
2209 clk_unprepare(video->vclk); in aspeed_video_remove()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| A D | power_state.h | 184 unsigned long vclk; member
|