| /linux/drivers/clk/spear/ |
| A D | clk-vco-pll.c | 128 if (pll->vco->lock) in clk_pll_recalc_rate() 196 if (vco->lock) in clk_vco_recalc_rate() 203 if (vco->lock) in clk_vco_recalc_rate() 238 if (vco->lock) in clk_vco_set_rate() 260 if (vco->lock) in clk_vco_set_rate() 291 vco = kzalloc(sizeof(*vco), GFP_KERNEL); in clk_register_vco_pll() 292 if (!vco) in clk_register_vco_pll() 302 vco->rtbl = rtbl; in clk_register_vco_pll() 304 vco->lock = lock; in clk_register_vco_pll() 307 pll->vco = vco; in clk_register_vco_pll() [all …]
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| A D | Makefile | 6 obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o
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| /linux/drivers/clk/versatile/ |
| A D | clk-icst.c | 82 vco->r = 22; in vco_get() 83 vco->s = 1; in vco_get() 97 vco->r = 46; in vco_get() 98 vco->s = 3; in vco_get() 115 vco->s = 1; in vco_get() 129 vco->r = 22; in vco_get() 136 vco->r = 22; in vco_get() 165 if (vco.s != 1) in vco_set() 182 val = (vco.v & 0xFF) | vco.s << 8; in vco_set() 190 val = ((vco.v & 0xFF) << 12) | (vco.s << 20); in vco_set() [all …]
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| A D | icst.c | 27 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) in icst_hz() argument 29 u64 dividend = p->ref * 2 * (u64)(vco.v + 8); in icst_hz() 30 u32 divisor = (vco.r + 2) * p->s2div[vco.s]; in icst_hz() 49 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; in icst_hz_to_vco() local 66 return vco; in icst_hz_to_vco() 68 vco.s = p->idx2s[i]; in icst_hz_to_vco() 91 vco.v = vd - 8; in icst_hz_to_vco() 92 vco.r = rd - 2; in icst_hz_to_vco() 99 return vco; in icst_hz_to_vco()
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| A D | icst.h | 30 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco);
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_cdclk.c | 1119 int vco = cdclk_config->vco; in skl_set_cdclk() local 2012 int vco = cdclk_config->vco; in bxt_cdclk_ctl() local 2042 int vco = cdclk_config->vco; in _bxt_set_cdclk() local 2287 if (a->vco == 0 || b->vco == 0) in intel_cdclk_can_crawl_and_squash() 2296 return a->vco != b->vco && in intel_cdclk_can_crawl_and_squash() 2317 a->vco != b->vco && in intel_cdclk_can_crawl() 2337 a->vco == b->vco && in intel_cdclk_can_squash() 2354 a->vco != b->vco || in intel_cdclk_clock_changed() 2388 a->vco == b->vco && in intel_cdclk_can_cd2x_update() 3030 vco = cdclk_state->logical.vco; in skl_dpll0_vco() [all …]
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| A D | intel_dpll.c | 36 } dot, vco, n, m, m1, m2, p, p1; member 45 .vco = { .min = 908000, .max = 1512000 }, 58 .vco = { .min = 908000, .max = 1512000 }, 71 .vco = { .min = 908000, .max = 1512000 }, 321 clock->vco = clock->n == 0 ? 0 : in pnv_calc_dpll_params() 339 clock->vco = clock->n + 2 == 0 ? 0 : in i9xx_calc_dpll_params() 352 clock->vco = clock->n == 0 ? 0 : in vlv_calc_dpll_params() 365 clock->vco = clock->n == 0 ? 0 : in chv_calc_dpll_params() 603 if (clock->vco < limit->vco.min || limit->vco.max < clock->vco) in intel_pll_is_valid() 2084 if (clock->vco == 5400000) { in chv_prepare_pll() [all …]
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| /linux/drivers/clk/berlin/ |
| A D | berlin2-avpll.c | 118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled() 119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled() 131 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_enable() 146 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_disable() 184 struct berlin2_avpll_vco *vco; in berlin2_avpll_vco_register() local 187 vco = kzalloc(sizeof(*vco), GFP_KERNEL); in berlin2_avpll_vco_register() 188 if (!vco) in berlin2_avpll_vco_register() 191 vco->base = base; in berlin2_avpll_vco_register() 192 vco->flags = vco_flags; in berlin2_avpll_vco_register() 193 vco->hw.init = &init; in berlin2_avpll_vco_register() [all …]
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| /linux/drivers/clk/ |
| A D | clk-si544.c | 203 u64 vco; in si544_calc_muldiv() local 229 do_div(vco, ls_freq); in si544_calc_muldiv() 230 settings->hs_div = vco; in si544_calc_muldiv() 241 tmp = do_div(vco, FXO); in si544_calc_muldiv() 245 vco = (u64)tmp << 32; in si544_calc_muldiv() 247 do_div(vco, FXO); in si544_calc_muldiv() 261 u64 vco; in si544_calc_center_rate() local 265 vco += (FXO / 2); in si544_calc_center_rate() 266 vco >>= 32; in si544_calc_center_rate() 272 do_div(vco, d); in si544_calc_center_rate() [all …]
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| A D | clk-lmk04832.c | 261 struct clk_hw vco; member 330 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_is_enabled() 345 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_prepare() 363 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_unprepare() 377 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_recalc_rate() 497 struct lmk04832 *lmk = container_of(hw, struct lmk04832, vco); in lmk04832_vco_round_rate() 634 lmk->vco.init = &init; in lmk04832_register_vco() 635 return devm_clk_hw_register(lmk->dev, &lmk->vco); in lmk04832_register_vco() 959 parent_names[0] = clk_hw_get_name(&lmk->vco); in lmk04832_register_sclk() 1305 parent_names[0] = clk_hw_get_name(&lmk->vco); in lmk04832_register_clkout() [all …]
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| /linux/drivers/clk/pistachio/ |
| A D | clk-pll.c | 199 u64 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_frac_set_rate() local 210 vco = params->fref; in pll_gf40lp_frac_set_rate() 211 vco *= (params->fbdiv << 24) + params->frac; in pll_gf40lp_frac_set_rate() 212 vco = div64_u64(vco, params->refdiv << 24); in pll_gf40lp_frac_set_rate() 214 if (vco < MIN_VCO_FRAC_FRAC || vco > MAX_VCO_FRAC_FRAC) in pll_gf40lp_frac_set_rate() 222 if (val > vco / 16) in pll_gf40lp_frac_set_rate() 224 name, val, vco / 16); in pll_gf40lp_frac_set_rate() 356 u32 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_laint_set_rate() local 367 if (vco < MIN_VCO_LA || vco > MAX_VCO_LA) in pll_gf40lp_laint_set_rate() 375 if (val > vco / 16) in pll_gf40lp_laint_set_rate() [all …]
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| /linux/drivers/clk/analogbits/ |
| A D | wrpll-cln28hpc.c | 230 u64 target_vco_rate, delta, best_delta, f_pre_div, vco, vco_pre; in wrpll_configure_for_rate() local 284 vco = vco_pre * f; in wrpll_configure_for_rate() 287 if (vco > target_vco_rate) { in wrpll_configure_for_rate() 289 vco = vco_pre * f; in wrpll_configure_for_rate() 290 } else if (vco < MIN_VCO_FREQ) { in wrpll_configure_for_rate() 292 vco = vco_pre * f; in wrpll_configure_for_rate() 295 delta = abs(target_rate - vco); in wrpll_configure_for_rate()
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| /linux/drivers/video/fbdev/matrox/ |
| A D | g450_pll.c | 106 unsigned int *vco, unsigned int fout) in g450_firstpll() argument 114 *vco = vcomax; in g450_firstpll() 116 *vco = fout; in g450_firstpll() 131 *vco = tvco; in g450_firstpll() 133 return g450_nextpll(minfo, pi, vco, 0xFF0000 | p); in g450_firstpll() 437 unsigned int vco; in __g450_setclk() local 440 vco = g450_mnp2vco(minfo, mnp); in __g450_setclk() 441 delta = pll_freq_delta(fout, g450_vco2f(mnp, vco)); in __g450_setclk() 453 && vco != g450_mnp2vco(minfo, mnparray[idx-1]) in __g450_setclk() 454 && vco < (pi->vcomin * 17 / 16)) { in __g450_setclk()
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| /linux/drivers/clk/bcm/ |
| A D | clk-iproc-pll.c | 277 struct iproc_pll_vco_param *vco) in pll_fractional_change_only() argument 293 if (ndiv_int != vco->ndiv_int) in pll_fractional_change_only() 299 if (pdiv != vco->pdiv) in pll_fractional_change_only() 311 unsigned long rate = vco->rate; in pll_set_rate() 321 if (vco->pdiv == 0) in pll_set_rate() 324 ref_freq = parent_rate / vco->pdiv; in pll_set_rate() 397 val |= vco->ndiv_int << ctrl->ndiv_int.shift; in pll_set_rate() 413 val |= vco->pdiv << ctrl->pdiv.shift; in pll_set_rate() 717 const struct iproc_pll_vco_param *vco, in iproc_pll_clk_setup() argument 790 if (vco) { in iproc_pll_clk_setup() [all …]
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| /linux/drivers/gpu/drm/gma500/ |
| A D | cdv_intel_display.c | 38 .vco = {.min = 1800000, .max = 3600000}, 50 .vco = {.min = 1800000, .max = 3600000}, 65 .vco = {.min = 1809000, .max = 3564000}, 77 .vco = {.min = 1800000, .max = 3600000}, 89 .vco = {.min = 1809000, .max = 3564000}, 101 .vco = {.min = 1800000, .max = 3600000}, 290 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv() 293 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv() 296 } else if (clock->vco < 3300000) { in cdv_dpll_set_clock_cdv() 398 clock->dot = clock->vco / clock->p; in cdv_intel_clock() [all …]
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| A D | gma_display.h | 26 int vco; member 41 struct gma_range_t dot, vco, n, m, m1, m2, p, p1; member
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| A D | psb_intel_display.c | 29 .vco = {.min = 1400000, .max = 2800000}, 41 .vco = {.min = 1400000, .max = 2800000}, 72 clock->vco = refclk * clock->m / (clock->n + 2); in psb_intel_clock() 73 clock->dot = clock->vco / clock->p; in psb_intel_clock()
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| /linux/drivers/gpu/drm/mgag200/ |
| A D | mgag200_g200er.c | 74 unsigned int computed, vco; in mgag200_g200er_pixpllc_atomic_check() local 89 vco = pllreffreq * (testn + 1) / in mgag200_g200er_pixpllc_atomic_check() 91 if (vco < vcomin) in mgag200_g200er_pixpllc_atomic_check() 93 if (vco > vcomax) in mgag200_g200er_pixpllc_atomic_check() 95 computed = vco / (m_div_val[testm] * (testo + 1)); in mgag200_g200er_pixpllc_atomic_check()
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| /linux/arch/powerpc/boot/ |
| A D | 4xx.c | 406 u32 cpu, plb, opb, ebc, vco; in __ibm440eplike_fixup_clocks() local 433 vco = sys_clk * m; in __ibm440eplike_fixup_clocks() 434 clk_a = vco / fwdva; in __ibm440eplike_fixup_clocks() 435 clk_b = vco / fwdvb; in __ibm440eplike_fixup_clocks() 439 vco = 0; in __ibm440eplike_fixup_clocks()
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| /linux/drivers/phy/rockchip/ |
| A D | phy-rockchip-inno-hdmi.c | 723 u64 vco; in inno_hdmi_phy_rk3228_clk_recalc_rate() local 729 vco = parent_rate * nf; in inno_hdmi_phy_rk3228_clk_recalc_rate() 732 do_div(vco, nd * 5); in inno_hdmi_phy_rk3228_clk_recalc_rate() 742 do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2)); in inno_hdmi_phy_rk3228_clk_recalc_rate() 745 inno->pixclock = vco; in inno_hdmi_phy_rk3228_clk_recalc_rate() 749 return vco; in inno_hdmi_phy_rk3228_clk_recalc_rate() 874 u64 vco; in inno_hdmi_phy_rk3328_clk_recalc_rate() local 880 vco = parent_rate * nf; in inno_hdmi_phy_rk3328_clk_recalc_rate() 886 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24)); in inno_hdmi_phy_rk3328_clk_recalc_rate() 890 do_div(vco, nd * 5); in inno_hdmi_phy_rk3328_clk_recalc_rate() [all …]
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| /linux/drivers/clk/mediatek/ |
| A D | clk-pll.c | 46 u64 vco; in __mtk_pll_recalc_rate() local 54 vco = (u64)fin * pcw; in __mtk_pll_recalc_rate() 56 if (pcwfbits && (vco & GENMASK(pcwfbits - 1, 0))) in __mtk_pll_recalc_rate() 59 vco >>= pcwfbits; in __mtk_pll_recalc_rate() 62 vco++; in __mtk_pll_recalc_rate() 64 return ((unsigned long)vco + postdiv - 1) / postdiv; in __mtk_pll_recalc_rate()
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| /linux/drivers/media/i2c/ |
| A D | mt9t112.c | 278 u32 vco, clk; in mt9t112_clock_info() local 307 vco = 2 * m * ext / (n + 1); in mt9t112_clock_info() 308 enable = ((vco < 384000) || (vco > 768000)) ? "X" : ""; in mt9t112_clock_info() 309 dev_dbg(&client->dev, "VCO : %10u K %s\n", vco, enable); in mt9t112_clock_info() 311 clk = vco / (p1 + 1) / (p2 + 1); in mt9t112_clock_info() 315 clk = vco / (p3 + 1); in mt9t112_clock_info() 319 clk = vco / (p6 + 1); in mt9t112_clock_info() 323 clk = vco / (p5 + 1); in mt9t112_clock_info() 327 clk = vco / (p4 + 1); in mt9t112_clock_info() 331 clk = vco / (p7 + 1); in mt9t112_clock_info()
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| /linux/arch/arm/boot/dts/arm/ |
| A D | integratorap.dts | 88 vco-offset = <0x08>; 98 vco-offset = <0x1c>; 119 vco-offset = <0x04>; 129 vco-offset = <0x04>;
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| A D | arm-realview-eb.dtsi | 237 vco-offset = <0x0C>; 245 vco-offset = <0x10>; 253 vco-offset = <0x14>; 261 vco-offset = <0x18>; 269 vco-offset = <0x1c>;
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| A D | arm-realview-pb11mp.dts | 346 vco-offset = <0x0C>; 354 vco-offset = <0x10>; 362 vco-offset = <0x14>; 370 vco-offset = <0x18>; 378 vco-offset = <0x1c>; 386 vco-offset = <0xd4>; 394 vco-offset = <0xd8>;
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