| /linux/drivers/gpu/drm/radeon/ |
| A D | btc_dpm.c | 2091 ps->high.vddc = max_limits->vddc; in btc_apply_state_adjust_rules() 2100 ps->medium.vddc = max_limits->vddc; in btc_apply_state_adjust_rules() 2108 if (ps->low.vddc > max_limits->vddc) in btc_apply_state_adjust_rules() 2109 ps->low.vddc = max_limits->vddc; in btc_apply_state_adjust_rules() 2119 vddc = ps->low.vddc; in btc_apply_state_adjust_rules() 2124 vddc = ps->low.vddc; in btc_apply_state_adjust_rules() 2131 ps->low.vddc = vddc; in btc_apply_state_adjust_rules() 2140 if (ps->medium.vddc < ps->low.vddc) in btc_apply_state_adjust_rules() 2141 ps->medium.vddc = ps->low.vddc; in btc_apply_state_adjust_rules() 2144 if (ps->high.vddc < ps->medium.vddc) in btc_apply_state_adjust_rules() [all …]
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| A D | rv6xx_dpm.c | 485 pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters() 486 pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters() 488 pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc; in rv6xx_calculate_voltage_stepping_parameters() 508 if ((state->high.vddc == state->medium.vddc) && in rv6xx_calculate_voltage_stepping_parameters() 516 if ((state->medium.vddc == state->low.vddc) && in rv6xx_calculate_voltage_stepping_parameters() 1207 new_state->low.vddc : old_state->low.vddc; in rv6xx_set_sw_voltage_to_safe() 1311 if (new_state->low.vddc > old_state->low.vddc) in rv6xx_step_voltage_if_increasing() 1326 if (new_state->low.vddc < old_state->low.vddc) in rv6xx_step_voltage_if_decreasing() 1822 u16 vddc; in rv6xx_parse_pplib_clock_info() local 1851 pl->vddc = vddc; in rv6xx_parse_pplib_clock_info() [all …]
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| A D | si_dpm.c | 2286 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values() 2295 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values() 2977 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules() 2978 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules() 3030 vddc = ps->performance_levels[0].vddc; in si_apply_state_adjust_rules() 3043 ps->performance_levels[0].vddc = vddc; in si_apply_state_adjust_rules() 3054 ps->performance_levels[i].vddc = vddc; in si_apply_state_adjust_rules() 3093 max_limits->vddc, &ps->performance_levels[i].vddc); in si_apply_state_adjust_rules() 3099 max_limits->vddc, &ps->performance_levels[i].vddc); in si_apply_state_adjust_rules() 4984 pl->vddc, &level->vddc); in si_convert_power_level_to_smc() [all …]
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| A D | rv770_dpm.c | 580 if (vddc <= pi->vddc_table[i].vddc) { in rv770_populate_vddc_value() 666 &level->vddc); in rv770_convert_power_level_to_smc() 1073 initial_state->low.vddc, in rv770_populate_smc_initial_state() 1694 u16 vddc; in rv770_get_max_vddc() local 1699 pi->max_vddc = vddc; in rv770_get_max_vddc() 2221 if (pl->vddc == 0xff01) { in rv7xx_parse_pplib_clock_info() 2223 pl->vddc = pi->max_vddc; in rv7xx_parse_pplib_clock_info() 2227 pi->acpi_vddc = pl->vddc; in rv7xx_parse_pplib_clock_info() 2251 u16 vddc, vddci, mvdd; in rv7xx_parse_pplib_clock_info() local 2255 pl->vddc = vddc; in rv7xx_parse_pplib_clock_info() [all …]
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| A D | ni_dpm.c | 812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules() 813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules() 837 ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; in ni_apply_state_adjust_rules() 875 max_limits->vddc, &ps->performance_levels[i].vddc); in ni_apply_state_adjust_rules() 881 max_limits->vddc, &ps->performance_levels[i].vddc); in ni_apply_state_adjust_rules() 884 max_limits->vddc, &ps->performance_levels[i].vddc); in ni_apply_state_adjust_rules() 1402 &vddc); in ni_calculate_power_boost_limit() 1412 &vddc); in ni_calculate_power_boost_limit() 2371 pl->vddc, &level->vddc); in ni_convert_power_level_to_smc() 3972 pl->vddc = vddc; in ni_parse_pplib_clock_info() [all …]
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| A D | rv6xx_dpm.h | 39 u16 vddc[R600_PM_NUMBER_OF_VOLTAGE_LEVELS]; member 81 u16 vddc; member
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| A D | rv770_dpm.h | 66 u16 vddc; member 145 u16 vddc; member 218 int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc,
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| A D | btc_dpm.h | 56 u16 *vddc, u16 *vddci);
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| A D | rv730_dpm.c | 244 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state() 251 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state() 362 initial_state->low.vddc, in rv730_populate_smc_initial_state() 363 &table->initialState.levels[0].vddc); in rv730_populate_smc_initial_state()
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| /linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| A D | si_dpm.c | 2443 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values() 2452 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values() 3397 u16 vddc; in rv770_get_max_vddc() local 3494 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules() 3495 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules() 3547 vddc = ps->performance_levels[0].vddc; in si_apply_state_adjust_rules() 3560 ps->performance_levels[0].vddc = vddc; in si_apply_state_adjust_rules() 3571 ps->performance_levels[i].vddc = vddc; in si_apply_state_adjust_rules() 5526 pl->vddc, &level->vddc); in si_convert_power_level_to_smc() 7237 pl->vddc = vddc; in si_parse_pplib_clock_info() [all …]
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| A D | si_dpm.h | 441 RV770_SMC_VOLTAGE_VALUE vddc; member 489 u16 vddc; member 608 u16 vddc; member 768 NISLANDS_SMC_VOLTAGE_VALUE vddc; member
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| A D | toshiba,tc358762.yaml | 27 vddc-supply: 50 - vddc-supply 64 vddc-supply = <&vcc_1v2_reg>;
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| A D | toshiba,tc358764.yaml | 23 vddc-supply: 53 - vddc-supply 73 vddc-supply = <&vcc_1v2_reg>;
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| A D | toshiba,tc358768.yaml | 29 vddc-supply: 76 - vddc-supply 103 vddc-supply = <&v1_2d>;
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | cyan_skillfish_ppt.c | 58 uint32_t vddc; member 467 cyan_skillfish_user_settings.vddc = input[2]; in cyan_skillfish_od_edit_dpm_table() 477 cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC; in cyan_skillfish_od_edit_dpm_table() 493 if ((cyan_skillfish_user_settings.vddc != CYAN_SKILLFISH_VDDC_MAGIC) && in cyan_skillfish_od_edit_dpm_table() 494 (cyan_skillfish_user_settings.vddc < CYAN_SKILLFISH_VDDC_MIN || in cyan_skillfish_od_edit_dpm_table() 495 cyan_skillfish_user_settings.vddc > CYAN_SKILLFISH_VDDC_MAX)) { in cyan_skillfish_od_edit_dpm_table() 508 if (cyan_skillfish_user_settings.vddc == CYAN_SKILLFISH_VDDC_MAGIC) { in cyan_skillfish_od_edit_dpm_table() 519 vid = (1550 - cyan_skillfish_user_settings.vddc) * 160 / 1000; in cyan_skillfish_od_edit_dpm_table()
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| /linux/Documentation/devicetree/bindings/iio/dac/ |
| A D | adi,ad9739a.yaml | 45 vddc-supply: 68 - vddc-supply 92 vddc-supply = <&vdd>;
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | hwmgr_ppt.h | 37 uint16_t vddc; member 66 uint16_t vddc; member
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| A D | smu7_hwmgr.c | 956 entries[i].vddc = dep_sclk_table->entries[i].vddc; in smu7_odn_initial_default_setting() 968 entries[i].vddc = dep_mclk_table->entries[i].vddc; in smu7_odn_initial_default_setting() 1039 if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { in smu7_check_dpm_table_updated() 1048 if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { in smu7_check_dpm_table_updated() 2119 if (vddc >= 2000 || vddc == 0) in smu7_get_evv_voltages() 2127 if (vddc != 0 && vddc != vv_id) { in smu7_get_evv_voltages() 2188 uint16_t *vddc) in smu7_patch_clock_voltage_limits_with_vddc_leakage() argument 2755 vddc = tab->vddc; in smu7_patch_limits_vddc() 2758 tab->vddc = vddc; in smu7_patch_limits_vddc() 2771 uint32_t vddc; in smu7_patch_cac_vddc() local [all …]
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| A D | smu_helper.c | 36 uint8_t convert_to_vid(uint16_t vddc) in convert_to_vid() argument 38 return (uint8_t) ((6200 - (vddc * VOLTAGE_SCALE)) / 25); in convert_to_vid() 569 if (req_vddc <= vddc_table->entries[i].vddc) { in phm_apply_dal_min_voltage_request() 570 req_volt = (((uint32_t)vddc_table->entries[i].vddc) * VOLTAGE_SCALE); in phm_apply_dal_min_voltage_request() 703 dep_table->entries[i].vddc = allowed_dep_table->entries[i].vddc; in smu_get_voltage_dependency_table_ppt_v1()
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| A D | vega10_hwmgr.c | 350 od_table[2]->entries[i].vddc = odn_table->max_vddc > od_table[2]->entries[i].vddc ? in vega10_odn_initial_default_setting() 352 od_table[2]->entries[i].vddc; in vega10_odn_initial_default_setting() 564 uint32_t vddc = 0; in vega10_get_evv_voltages() local 595 PP_ASSERT_WITH_CODE((vddc < 2000 && vddc != 0), in vega10_get_evv_voltages() 599 if (vddc != 0 && vddc != vv_id) { in vega10_get_evv_voltages() 659 uint16_t *vddc) in vega10_patch_clock_voltage_limits_with_vddc_leakage() argument 692 vdt->entries[entry_id].vddc = in vega10_patch_voltage_dependency_tables_with_lookup_table() 1930 uint16_t clk = 0, vddc = 0; in vega10_populate_single_display_type() local 2541 if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { in vega10_check_dpm_table_updated() 2550 if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { in vega10_check_dpm_table_updated() [all …]
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| A D | toshiba,tc358746.yaml | 52 vddc-supply: 122 - vddc-supply 146 vddc-supply = <&v1_2d>;
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| /linux/arch/arm64/boot/dts/freescale/ |
| A D | imx8mp-venice-gw74xx-rpidsi.dtso | 50 vddc-supply = <&attiny>;
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| A D | imx8mm-venice-gw72xx-0x-rpidsi.dtso | 54 vddc-supply = <&attiny>;
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| A D | imx8mm-venice-gw73xx-0x-rpidsi.dtso | 54 vddc-supply = <&attiny>;
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| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| A D | hardwaremanager.h | 273 uint32_t vddc; member 385 uint32_t vddc; member
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