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Searched refs:vdsc_cfg (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_vdsc.c107 if (vdsc_cfg->native_420) { in calculate_rc_params()
115 vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11, in calculate_rc_params()
138 if (vdsc_cfg->native_420) { in calculate_rc_params()
246 if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 15000) in intel_dsc_slice_dimensions_valid()
255 if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 30000) in intel_dsc_slice_dimensions_valid()
272 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params()
304 if (vdsc_cfg->native_420) in intel_dsc_compute_params()
343 vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) / in intel_dsc_compute_params()
344 (vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset); in intel_dsc_compute_params()
456 if (vdsc_cfg->simple_422) in intel_dsc_pps_configure()
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A Dicl_dsi.c1583 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in gen11_dsi_dsc_compute_config() local
1600 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in gen11_dsi_dsc_compute_config()
1602 vdsc_cfg->pic_height = crtc_state->hw.adjusted_mode.crtc_vdisplay; in gen11_dsi_dsc_compute_config()
1609 drm_WARN_ON(&dev_priv->drm, vdsc_cfg->vbr_enable); in gen11_dsi_dsc_compute_config()
1610 drm_WARN_ON(&dev_priv->drm, vdsc_cfg->simple_422); in gen11_dsi_dsc_compute_config()
1612 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
1613 drm_WARN_ON(&dev_priv->drm, vdsc_cfg->slice_height < 8); in gen11_dsi_dsc_compute_config()
1615 vdsc_cfg->pic_height % vdsc_cfg->slice_height); in gen11_dsi_dsc_compute_config()
1617 ret = drm_dsc_compute_rc_parameters(vdsc_cfg); in gen11_dsi_dsc_compute_config()
A Dintel_dp.c1818 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dp_dsc_compute_params() local
1827 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in intel_dp_dsc_compute_params()
1830 vdsc_cfg->slice_height = intel_dp_get_slice_height(vdsc_cfg->pic_height); in intel_dp_dsc_compute_params()
1836 vdsc_cfg->dsc_version_major = in intel_dp_dsc_compute_params()
1839 vdsc_cfg->dsc_version_minor = in intel_dp_dsc_compute_params()
1842 if (vdsc_cfg->convert_rgb) in intel_dp_dsc_compute_params()
1843 vdsc_cfg->convert_rgb = in intel_dp_dsc_compute_params()
1847 vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, in intel_dp_dsc_compute_params()
1849 if (!vdsc_cfg->line_buf_depth) { in intel_dp_dsc_compute_params()
1855 vdsc_cfg->block_pred_enable = in intel_dp_dsc_compute_params()
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A Dintel_bios.c3536 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in fill_dsc() local
3539 vdsc_cfg->dsc_version_major = dsc->version_major; in fill_dsc()
3540 vdsc_cfg->dsc_version_minor = dsc->version_minor; in fill_dsc()
3587 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, in fill_dsc()
3591 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); in fill_dsc()
3593 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; in fill_dsc()
3595 vdsc_cfg->slice_height = dsc->slice_height; in fill_dsc()
A Dintel_psr.c1255 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in psr2_granularity_check() local
1287 vdsc_cfg->slice_height % y_granularity) in psr2_granularity_check()
2393 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_psr2_sel_fetch_pipe_alignment() local
2399 y_alignment = vdsc_cfg->slice_height; in intel_psr2_sel_fetch_pipe_alignment()
/linux/drivers/gpu/drm/display/
A Ddrm_dsc_helper.c1322 if (vdsc_cfg->native_420 || vdsc_cfg->native_422) { in drm_dsc_compute_rc_parameters()
1328 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width / 2 * in drm_dsc_compute_rc_parameters()
1337 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width * in drm_dsc_compute_rc_parameters()
1355 slice_bits = 8 * vdsc_cfg->slice_chunk_size * vdsc_cfg->slice_height; in drm_dsc_compute_rc_parameters()
1371 vdsc_cfg->final_offset = vdsc_cfg->rc_model_size - in drm_dsc_compute_rc_parameters()
1375 if (vdsc_cfg->final_offset >= vdsc_cfg->rc_model_size) { in drm_dsc_compute_rc_parameters()
1381 (vdsc_cfg->rc_model_size - vdsc_cfg->final_offset); in drm_dsc_compute_rc_parameters()
1397 vdsc_cfg->slice_bpg_offset = DIV_ROUND_UP(((vdsc_cfg->rc_model_size - in drm_dsc_compute_rc_parameters()
1427 rbs_min = vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()
1433 vdsc_cfg->rc_bits = (hrd_delay * vdsc_cfg->bits_per_pixel) / 16; in drm_dsc_compute_rc_parameters()
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/linux/include/drm/display/
A Ddrm_dsc_helper.h26 void drm_dsc_set_const_params(struct drm_dsc_config *vdsc_cfg);
27 void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg);
28 int drm_dsc_setup_rc_params(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type);
29 int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg);
32 u32 drm_dsc_get_bpp_int(const struct drm_dsc_config *vdsc_cfg);

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