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/linux/drivers/gpu/drm/omapdrm/dss/
A Dhdmi_wp.c44 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
53 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
102 int hdmi_wp_video_start(struct hdmi_wp_data *wp) in hdmi_wp_video_start() argument
109 void hdmi_wp_video_stop(struct hdmi_wp_data *wp) in hdmi_wp_video_stop() argument
178 if (wp->version == 4) in hdmi_wp_video_config_timing()
233 if (wp->version == 4) { in hdmi_wp_audio_config_format()
285 if (IS_ERR(wp->base)) in hdmi_wp_init()
286 return PTR_ERR(wp->base); in hdmi_wp_init()
288 wp->phys_base = res->start; in hdmi_wp_init()
289 wp->version = version; in hdmi_wp_init()
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A Dhdmi.h239 struct hdmi_wp_data *wp; member
261 struct hdmi_wp_data *wp; member
296 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
297 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
299 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
305 void hdmi_wp_video_config_format(struct hdmi_wp_data *wp,
309 void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
320 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp);
339 void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,
341 void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp,
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A Dhdmi5.c68 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
71 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
72 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
173 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
174 hdmi_wp_get_irqstatus(&hdmi->wp)); in hdmi_power_on_full()
205 r = hdmi_wp_video_start(&hdmi->wp); in hdmi_power_on_full()
209 hdmi_wp_set_irqenable(&hdmi->wp, in hdmi_power_on_full()
231 hdmi_wp_video_stop(&hdmi->wp); in hdmi_power_off_full()
253 hdmi_wp_dump(&hdmi->wp, s); in hdmi_dump_regs()
266 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
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A Dhdmi4.c67 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
70 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
71 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
150 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
206 r = hdmi_wp_video_start(&hdmi->wp); in hdmi_power_on_full()
210 hdmi_wp_set_irqenable(wp, in hdmi_power_on_full()
232 hdmi_wp_video_stop(&hdmi->wp); in hdmi_power_off_full()
254 hdmi_wp_dump(&hdmi->wp, s); in hdmi_dump_regs()
266 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
272 hdmi4_audio_stop(&hd->core, &hd->wp); in hdmi_stop_audio_stream()
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A Dhdmi_pll.c42 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
50 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
60 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
63 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
147 if (hpll->wp->version == 4) in hdmi_init_pll_data()
162 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_init() argument
167 pll->wp = wp; in hdmi_pll_init()
A Dhdmi4_cec.c164 hdmi_wp_clear_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
165 hdmi_wp_set_irqstatus(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
166 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
178 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0x18, 5, 0); in hdmi_cec_adap_enable()
201 hdmi_wp_set_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
238 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
326 struct hdmi_wp_data *wp) in hdmi4_cec_init() argument
337 core->wp = wp; in hdmi4_cec_init()
340 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi4_cec_init()
/linux/drivers/video/fbdev/omap2/omapfb/dss/
A Dhdmi_wp.c45 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
47 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
54 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
103 int hdmi_wp_video_start(struct hdmi_wp_data *wp) in hdmi_wp_video_start() argument
110 void hdmi_wp_video_stop(struct hdmi_wp_data *wp) in hdmi_wp_video_stop() argument
154 r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG); in hdmi_wp_video_config_interface()
159 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r); in hdmi_wp_video_config_interface()
267 wp->phys_base = res->start; in hdmi_wp_init()
270 if (IS_ERR(wp->base)) { in hdmi_wp_init()
272 return PTR_ERR(wp->base); in hdmi_wp_init()
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A Dhdmi.h233 struct hdmi_wp_data *wp; member
277 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
278 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
280 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
286 void hdmi_wp_video_config_format(struct hdmi_wp_data *wp,
288 void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp,
290 void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
302 struct hdmi_wp_data *wp);
320 void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,
322 void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp,
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A Dhdmi5.c65 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
68 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
69 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
179 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
180 hdmi_wp_get_irqstatus(&hdmi.wp)); in hdmi_power_on_full()
213 r = hdmi_wp_video_start(&hdmi.wp); in hdmi_power_on_full()
221 hdmi_wp_set_irqenable(&hdmi.wp, in hdmi_power_on_full()
227 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_on_full()
247 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_off_full()
298 hdmi_wp_dump(&hdmi.wp, s); in hdmi_dump_regs()
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A Dhdmi4.c61 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
64 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
65 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
148 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
196 r = hdmi_wp_video_start(&hdmi.wp); in hdmi_power_on_full()
204 hdmi_wp_set_irqenable(wp, in hdmi_power_on_full()
210 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_on_full()
230 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_off_full()
277 hdmi_wp_dump(&hdmi.wp, s); in hdmi_dump_regs()
305 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
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A Dhdmi_pll.c102 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
106 return hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
112 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
114 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
209 struct hdmi_wp_data *wp) in hdmi_pll_init() argument
213 pll->wp = wp; in hdmi_pll_init()
/linux/arch/powerpc/math-emu/
A Dmath_efp.c109 u32 wp[2]; member
210 pr_debug("vc: %08x %08x\n", vc.wp[0], vc.wp[1]); in do_spe_mathemu()
236 vc.wp[1] = va.wp[1] & ~SIGN_BIT_S; in do_spe_mathemu()
240 vc.wp[1] = va.wp[1] | SIGN_BIT_S; in do_spe_mathemu()
244 vc.wp[1] = va.wp[1] ^ SIGN_BIT_S; in do_spe_mathemu()
520 vc.wp[0] = va.wp[0] & ~SIGN_BIT_S; in do_spe_mathemu()
521 vc.wp[1] = va.wp[1] & ~SIGN_BIT_S; in do_spe_mathemu()
525 vc.wp[0] = va.wp[0] | SIGN_BIT_S; in do_spe_mathemu()
526 vc.wp[1] = va.wp[1] | SIGN_BIT_S; in do_spe_mathemu()
530 vc.wp[0] = va.wp[0] ^ SIGN_BIT_S; in do_spe_mathemu()
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/linux/lib/crypto/mpi/
A Dmpi-mul.c19 mpi_ptr_t up, vp, wp; in mpi_mul() local
43 wp = w->d; in mpi_mul()
48 if (wp == up || wp == vp) { in mpi_mul()
50 if (!wp) in mpi_mul()
57 wp = w->d; in mpi_mul()
60 if (wp == up) { in mpi_mul()
66 if (wp == vp) in mpi_mul()
69 MPN_COPY(up, wp, usize); in mpi_mul()
70 } else if (wp == vp) { in mpi_mul()
76 MPN_COPY(vp, wp, vsize); in mpi_mul()
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A Dmpi-add.c18 mpi_ptr_t wp, up, vp; in mpi_add() local
48 wp = w->d; in mpi_add()
52 MPN_COPY(wp, up, usize); in mpi_add()
58 mpihelp_sub(wp, up, usize, vp, vsize); in mpi_add()
60 MPN_NORMALIZE(wp, wsize); in mpi_add()
63 mpihelp_sub_n(wp, vp, up, usize); in mpi_add()
65 MPN_NORMALIZE(wp, wsize); in mpi_add()
69 mpihelp_sub_n(wp, up, vp, usize); in mpi_add()
71 MPN_NORMALIZE(wp, wsize); in mpi_add()
76 mpi_limb_t cy = mpihelp_add(wp, up, usize, vp, vsize); in mpi_add()
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A Dgeneric_mpih-rshift.c29 mpihelp_rshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned cnt) in mpihelp_rshift() argument
37 wp -= 1; in mpihelp_rshift()
44 wp[i] = (low_limb >> sh_1) | (high_limb << sh_2); in mpihelp_rshift()
47 wp[i] = low_limb >> sh_1; in mpihelp_rshift()
A Dgeneric_mpih-lshift.c28 mpihelp_lshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned int cnt) in mpihelp_lshift() argument
36 wp += 1; in mpihelp_lshift()
44 wp[i] = (high_limb << sh_1) | (low_limb >> sh_2); in mpihelp_lshift()
47 wp[i] = high_limb << sh_1; in mpihelp_lshift()
/linux/fs/bcachefs/
A Dalloc_foreground.c1239 wp = NULL; in __writepoint_find()
1242 return wp; in __writepoint_find()
1308 return wp; in writepoint_find()
1314 if (wp) { in writepoint_find()
1325 wp < c->write_points + c->write_points_nr; wp++) in writepoint_find()
1339 if (wp && wp != oldest) { in writepoint_find()
1345 wp = oldest; in writepoint_find()
1352 return wp; in writepoint_find()
1586 wp < c->write_points + c->write_points_nr; wp++) { in bch2_fs_allocator_foreground_init()
1590 wp->write_point = (unsigned long) wp; in bch2_fs_allocator_foreground_init()
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A Dalloc_foreground.h97 open_bucket_for_each(c, &wp->ptrs, ob, i) in bch2_alloc_sectors_done_inlined()
99 wp->ptrs = keep; in bch2_alloc_sectors_done_inlined()
101 mutex_unlock(&wp->lock); in bch2_alloc_sectors_done_inlined()
107 struct write_point *wp, in bch2_open_bucket_get() argument
113 open_bucket_for_each(c, &wp->ptrs, ob, i) { in bch2_open_bucket_get()
114 ob->data_type = wp->data_type; in bch2_open_bucket_get()
189 BUG_ON(sectors > wp->sectors_free); in bch2_alloc_sectors_append_ptrs_inlined()
190 wp->sectors_free -= sectors; in bch2_alloc_sectors_append_ptrs_inlined()
191 wp->sectors_allocated += sectors; in bch2_alloc_sectors_append_ptrs_inlined()
193 open_bucket_for_each(c, &wp->ptrs, ob, i) { in bch2_alloc_sectors_append_ptrs_inlined()
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A Dio_write.c563 if (state != wp->state) { in __wp_update_state()
568 wp->time[wp->state] += now - wp->last_state_change; in __wp_update_state()
569 wp->state = state; in __wp_update_state()
588 struct write_point *wp = op->wp; in CLOSURE_CALLBACK() local
607 op->wp = wp; in bch2_write_queue()
618 struct write_point *wp = in bch2_write_point_do_index_updates() local
714 struct write_point *wp, in bch2_write_bio_alloc() argument
1058 wp->sectors_free && in bch2_write_extent()
1447 &op->cl, &wp))); in __bch2_write()
1455 EBUG_ON(!wp); in __bch2_write()
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/linux/tools/testing/selftests/breakpoints/
A Dbreakpoint_test_arm64.c81 static bool set_watchpoint(pid_t pid, int size, int wp) in set_watchpoint() argument
83 const volatile uint8_t *addr = &var[32 + wp]; in set_watchpoint()
112 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
143 if (!set_watchpoint(pid, wp_size, wp)) in run_test()
204 int wr, wp, size; in main() local
216 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
217 result = run_test(size, MIN(size, 8), wr, wp); in main()
218 if ((result && wr == wp) || in main()
219 (!result && wr != wp)) in main()
222 size, wr, wp); in main()
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/linux/drivers/accel/ivpu/
A Divpu_hw_btrs.c276 wp_request_mtl(vdev, wp); in wp_request()
278 wp_request_lnl(vdev, wp); in wp_request()
291 wp_request(vdev, wp); in wp_request_send()
304 wp->min = hw->pll.min_ratio; in prepare_wp_request()
305 wp->max = hw->pll.max_ratio; in prepare_wp_request()
310 wp->cdyn = 0; in prepare_wp_request()
311 wp->epp = 0; in prepare_wp_request()
313 wp->target = hw->pll.pn_ratio; in prepare_wp_request()
321 wp->cfg = 1; in prepare_wp_request()
339 struct wp_request wp; in ivpu_hw_btrs_wp_drive() local
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/linux/drivers/block/null_blk/
A Dzoned.c161 zone->wp = zone->start; in null_init_zoned_dev()
222 blkz.wp = zone->wp; in null_report_zones()
252 if (sector > zone->wp) in null_zone_valid_read_len()
275 if (zone->wp == zone->start) { in null_close_imp_open_zone()
382 sector = zone->wp; in null_zone_write()
386 if (sector != zone->wp || in null_zone_write()
419 zone->wp += nr_sectors; in null_zone_write()
530 if (zone->wp > zone->start) in null_close_zone()
536 if (zone->wp == zone->start) in null_close_zone()
626 zone->wp = zone->start; in null_reset_zone()
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/linux/lib/raid6/
A Dneon.uc63 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
71 wq$$ = wp$$ = vld1q_u8(&dptr[z0][d+$$*NSIZE]);
74 wp$$ = veorq_u8(wp$$, wd$$);
82 vst1q_u8(&p[d+NSIZE*$$], wp$$);
94 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
103 wp$$ = veorq_u8(vld1q_u8(&p[d+$$*NSIZE]), wq$$);
108 wp$$ = veorq_u8(wp$$, wd$$);
150 vst1q_u8(&p[d+NSIZE*$$], wp$$);
/linux/sound/hda/
A Dhdac_controller.c71 bus->rirb.wp = bus->rirb.rp = 0; in snd_hdac_bus_init_cmd_io()
229 unsigned int wp, rp; in snd_hdac_bus_send_cmd_corb() local
237 if (wp == 0xffff) { in snd_hdac_bus_send_cmd_corb()
242 wp++; in snd_hdac_bus_send_cmd_corb()
243 wp %= AZX_MAX_CORB_ENTRIES; in snd_hdac_bus_send_cmd_corb()
246 if (wp == rp) { in snd_hdac_bus_send_cmd_corb()
272 unsigned int rp, wp; in snd_hdac_bus_update_rirb() local
277 if (wp == 0xffff) { in snd_hdac_bus_update_rirb()
282 if (wp == bus->rirb.wp) in snd_hdac_bus_update_rirb()
284 bus->rirb.wp = wp; in snd_hdac_bus_update_rirb()
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/linux/arch/arm/kernel/
A Dhw_breakpoint.c745 wp = slots[i]; in watchpoint_handler()
746 if (wp == NULL) in watchpoint_handler()
757 info = counter_arch_bp(wp); in watchpoint_handler()
795 perf_bp_event(wp, regs); in watchpoint_handler()
810 wp = slots[closest_match]; in watchpoint_handler()
811 info = counter_arch_bp(wp); in watchpoint_handler()
814 perf_bp_event(wp, regs); in watchpoint_handler()
833 wp = slots[i]; in watchpoint_single_step_handler()
835 if (wp == NULL) in watchpoint_single_step_handler()
838 info = counter_arch_bp(wp); in watchpoint_single_step_handler()
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