| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_kernel_queue.h | 71 uint64_t wptr_gpu_addr; member
|
| A D | kfd_kernel_queue.c | 124 kq->wptr_gpu_addr = kq->wptr_mem->gpu_addr; in kq_initialize() 139 prop.write_ptr = (uint32_t *) kq->wptr_gpu_addr; in kq_initialize()
|
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_mes.c | 591 mqd_prop.wptr_gpu_addr = p->wptr_gpu_addr; in amdgpu_mes_queue_init_mqd() 693 queue_input.wptr_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue() 713 queue->wptr_gpu_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue() 861 queue_input.wptr_addr = ring->wptr_gpu_addr; in amdgpu_mes_map_legacy_queue() 909 queue_input.wptr_addr = ring->wptr_gpu_addr; in amdgpu_mes_reset_legacy_queue() 1096 props->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_mes_ring_to_queue_props()
|
| A D | amdgpu_ring.c | 294 ring->wptr_gpu_addr = in amdgpu_ring_init() 673 prop->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_ring_to_mqd_prop()
|
| A D | sdma_v4_0.c | 1095 u64 wptr_gpu_addr; in sdma_v4_0_gfx_resume() local 1141 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_gfx_resume() 1143 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume() 1145 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume() 1180 u64 wptr_gpu_addr; in sdma_v4_0_page_resume() local 1227 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_page_resume() 1229 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume() 1231 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume()
|
| A D | amdgpu_mes.h | 188 uint64_t wptr_gpu_addr; member 198 uint64_t wptr_gpu_addr; member
|
| A D | sdma_v4_4_2.c | 681 u64 wptr_gpu_addr; in sdma_v4_4_2_gfx_resume() local 729 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v4_4_2_gfx_resume() 731 lower_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_gfx_resume() 733 upper_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_gfx_resume() 769 u64 wptr_gpu_addr; in sdma_v4_4_2_page_resume() local 818 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v4_4_2_page_resume() 820 lower_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_page_resume() 822 upper_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_page_resume()
|
| A D | sdma_v3_0.c | 642 u64 wptr_gpu_addr; in sdma_v3_0_gfx_resume() local 705 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v3_0_gfx_resume() 708 lower_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume() 710 upper_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume()
|
| A D | sdma_v7_0.c | 508 u64 wptr_gpu_addr; in sdma_v7_0_gfx_resume() local 536 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v7_0_gfx_resume() 538 lower_32_bits(wptr_gpu_addr)); in sdma_v7_0_gfx_resume() 540 upper_32_bits(wptr_gpu_addr)); in sdma_v7_0_gfx_resume() 870 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v7_0_mqd_init()
|
| A D | sdma_v6_0.c | 487 u64 wptr_gpu_addr; in sdma_v6_0_gfx_resume() local 515 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v6_0_gfx_resume() 517 lower_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume() 519 upper_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume() 848 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
|
| A D | sdma_v5_2.c | 541 u64 wptr_gpu_addr; in sdma_v5_2_gfx_resume() local 568 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_2_gfx_resume() 570 lower_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume() 572 upper_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume() 834 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
|
| A D | sdma_v5_0.c | 724 u64 wptr_gpu_addr; in sdma_v5_0_gfx_resume() local 751 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_0_gfx_resume() 753 lower_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume() 755 upper_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume() 984 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
|
| A D | gfx_v11_0.c | 312 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx11_kiq_map_queues() 3534 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume() local 3564 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume() 3566 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume() 3568 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume() 3601 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume() 3603 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume() 3605 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume() 3952 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init() 4130 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
|
| A D | amdgpu_ring.h | 276 u64 wptr_gpu_addr; member
|
| A D | gfx_v12_0.c | 263 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v12_0_kiq_map_queues() 2579 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v12_0_cp_gfx_resume() local 2610 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v12_0_cp_gfx_resume() 2612 lower_32_bits(wptr_gpu_addr)); in gfx_v12_0_cp_gfx_resume() 2614 upper_32_bits(wptr_gpu_addr)); in gfx_v12_0_cp_gfx_resume() 2888 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_gfx_mqd_init() 3074 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_compute_mqd_init()
|
| A D | gfx_v10_0.c | 3695 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx10_kiq_map_queues() 6350 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume() local 6383 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume() 6385 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume() 6387 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume() 6420 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume() 6422 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume() 6424 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume() 6660 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init() 6857 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
|
| A D | gfx_v8_0.c | 4238 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume() local 4268 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume() 4269 WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume() 4270 WREG32(mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume() 4350 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v8_0_kiq_kcq_enable() 4480 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_mqd_init()
|
| A D | gfx_v9_0.c | 928 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v9_0_kiq_map_queues() 3326 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume() local 3354 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume() 3355 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume() 3356 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume() 3571 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
|
| A D | amdgpu.h | 807 uint64_t wptr_gpu_addr; member
|
| A D | mes_v12_0.c | 1051 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v12_0_mqd_init()
|
| A D | mes_v11_0.c | 1085 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
|
| A D | gfx_v7_0.c | 2875 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v7_0_mqd_init()
|