Searched refs:CSR_DBG (Results 1 – 5 of 5) sorted by relevance
| /qemu/target/loongarch/ |
| A D | cpu-csr.h | 202 FIELD(CSR_DBG, DST, 0, 1)
203 FIELD(CSR_DBG, DREV, 1, 7)
204 FIELD(CSR_DBG, DEI, 8, 1)
205 FIELD(CSR_DBG, DCL, 9, 1)
206 FIELD(CSR_DBG, DFW, 10, 1)
207 FIELD(CSR_DBG, DMW, 11, 1)
208 FIELD(CSR_DBG, ECODE, 16, 6)
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| A D | cpu.c | 144 !(FIELD_EX64(env->CSR_DBG, CSR_DBG, DST))); in cpu_loongarch_hw_interrupts_enabled()
183 env->CSR_DBG = FIELD_DP64(env->CSR_DBG, CSR_DBG, DCL, 1); in loongarch_cpu_do_interrupt()
184 env->CSR_DBG = FIELD_DP64(env->CSR_DBG, CSR_DBG, ECODE, 0xC); in loongarch_cpu_do_interrupt()
188 env->CSR_DBG = FIELD_DP64(env->CSR_DBG, CSR_DBG, DST, 1); in loongarch_cpu_do_interrupt()
192 if (FIELD_EX64(env->CSR_DBG, CSR_DBG, DST)) { in loongarch_cpu_do_interrupt()
193 env->CSR_DBG = FIELD_DP64(env->CSR_DBG, CSR_DBG, DEI, 1); in loongarch_cpu_do_interrupt()
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| A D | machine.c | 230 VMSTATE_UINT64(env.CSR_DBG, LoongArchCPU),
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| A D | cpu.h | 364 uint64_t CSR_DBG; member
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| /qemu/target/loongarch/tcg/ |
| A D | tlb_helper.c | 109 if (!FIELD_EX64(env->CSR_DBG, CSR_DBG, DST)) { in raise_mmu_exception()
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