Searched refs:CSR_MISC (Results 1 – 6 of 6) sorted by relevance
| /qemu/target/loongarch/ |
| A D | cpu-csr.h | 30 FIELD(CSR_MISC, VA32, 0, 4)
31 FIELD(CSR_MISC, DRDTL, 4, 4)
32 FIELD(CSR_MISC, RPCNTL, 8, 4)
33 FIELD(CSR_MISC, ALCL, 12, 4)
34 FIELD(CSR_MISC, DWPL, 16, 3)
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| A D | cpu.h | 316 uint64_t CSR_MISC; member
449 if (plv >= 1 && (FIELD_EX64(env->CSR_MISC, CSR_MISC, VA32) & (1 << plv))) { in is_va32()
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| A D | machine.c | 181 VMSTATE_UINT64(env.CSR_MISC, LoongArchCPU),
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| A D | cpu.c | 539 env->CSR_MISC = 0; in loongarch_cpu_reset_hold()
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| /qemu/target/loongarch/tcg/ |
| A D | op_helper.c | 97 if (extract64(env->CSR_MISC, R_CSR_MISC_DRDTL_SHIFT + plv, 1)) { in helper_rdtime_d()
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| /qemu/target/loongarch/kvm/ |
| A D | kvm.c | 145 &env->CSR_MISC); in kvm_loongarch_get_csr()
315 &env->CSR_MISC); in kvm_loongarch_put_csr()
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