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/qemu/target/openrisc/
A Ddisas.c179 a->a, a->a + a->ap + 1,
183 a->a, a->a + a->ap + 1,
187 a->a, a->a + a->ap + 1,
191 a->a, a->a + a->ap + 1,
195 a->a, a->a + a->ap + 1,
199 a->a, a->a + a->ap + 1,
204 a->a, a->a + a->ap + 1)
207 a->a, a->a + a->ap + 1)
212 a->d, a->a, a->a + a->ap + 1)
215 a->a, a->a + a->ap + 1,
[all …]
A Dtranslate.c802 tcg_gen_andi_tl(cpu_R(dc, a->d), cpu_R(dc, a->a), a->k); in trans_l_andi()
809 tcg_gen_ori_tl(cpu_R(dc, a->d), cpu_R(dc, a->a), a->k); in trans_l_ori()
816 tcg_gen_xori_tl(cpu_R(dc, a->d), cpu_R(dc, a->a), a->i); in trans_l_xori()
1300 !check_pair(dc, a->a, a->ap) || in do_dp3()
1309 load_pair(dc, t0, a->a, a->ap); in do_dp3()
1324 !check_pair(dc, a->a, a->ap) || in do_dp2()
1331 load_pair(dc, t0, a->a, a->ap); in do_dp2()
1346 !check_pair(dc, a->a, a->ap) || in do_dpcmp()
1353 load_pair(dc, t0, a->a, a->ap); in do_dpcmp()
1432 load_pair(dc, t0, a->a, a->ap); in trans_lf_dtos_d()
[all …]
A Dinsns.decode20 &dab d a b
21 &da d a
22 &ab a b
23 &dal d a l
24 &ai a i
26 &ab_pair a b ap bp
27 &da_pair d a dp ap
57 &load d a i
61 &store a b i
83 &rri d a i
[all …]
/qemu/target/rx/
A Ddisas.c200 size[a->sz], a->rs, a->dsp << a->sz, a->rd); in trans_MOV_rm()
213 size[a->sz], a->dsp << a->sz, a->rs, a->rd); in trans_MOV_mr()
236 size[a->sz], a->imm, a->dsp << a->sz, a->rd); in trans_MOV_im()
313 a->dsp << a->sz, a->rs, a->rd); in trans_MOVU_mr()
407 prt_ldmi(ctx, "xchg", a->ld, a->mi, a->rs, a->rd); in trans_XCHG_mr()
451 prt_ldmi(ctx, "and", a->ld, a->mi, a->rs, a->rd); in trans_AND_mr()
474 prt_ldmi(ctx, "or", a->ld, a->mi, a->rs, a->rd); in trans_OR_mr()
496 prt_ldmi(ctx, "xor", a->ld, a->mi, a->rs, a->rd); in trans_XOR_mr()
511 prt_ldmi(ctx, "tst", a->ld, a->mi, a->rs, a->rd); in trans_TST_mr()
579 prt_ldmi(ctx, "add", a->ld, a->mi, a->rs, a->rd); in trans_ADD_mr()
[all …]
A Dtranslate.c849 rx_gen_op_mr(rx_and, ctx, a->rd, a->rs, a->ld, a->mi); in trans_AND_mr()
879 rx_gen_op_mr(rx_or, ctx, a->rd, a->rs, a->ld, a->mi); in trans_OR_mr()
908 rx_gen_op_mr(rx_xor, ctx, a->rd, a->rs, a->ld, a->mi); in trans_XOR_mr()
929 rx_gen_op_mr(rx_tst, ctx, a->rd, a->rs, a->ld, a->mi); in trans_TST_mr()
1000 rx_gen_op_mr(rx_adc, ctx, a->rd, a->rs, a->ld, a->mi); in trans_ADC_mr()
1028 rx_gen_op_mr(rx_add, ctx, a->rd, a->rs, a->ld, a->mi); in trans_ADD_mr()
1082 rx_gen_op_mr(rx_cmp, ctx, a->rd, a->rs, a->ld, a->mi); in trans_CMP_mr()
1097 rx_gen_op_mr(rx_sub, ctx, a->rd, a->rs, a->ld, a->mi); in trans_SUB_mr()
1122 rx_gen_op_mr(rx_sbb, ctx, a->rd, a->rs, a->ld, a->mi); in trans_SBB_mr()
1262 rx_gen_op_mr(rx_div, ctx, a->rd, a->rs, a->ld, a->mi); in trans_DIV_mr()
[all …]
/qemu/include/qemu/
A Dint128.h169 return a < b ? a : b; in int128_min()
174 return a > b ? a : b; in int128_max()
301 return int128_make128(~a.lo, ~a.hi); in int128_not()
389 return a.lo == b.lo && a.hi == b.hi; in int128_eq()
399 return a.hi > b.hi || (a.hi == b.hi && a.lo >= b.lo); in int128_ge()
404 return (uint64_t)a.hi > (uint64_t)b.hi || (a.hi == b.hi && a.lo >= b.lo); in int128_uge()
429 return a.lo || a.hi; in int128_nz()
434 return int128_le(a, b) ? a : b; in int128_min()
439 return int128_ge(a, b) ? a : b; in int128_max()
444 *a = int128_add(*a, b); in int128_addto()
[all …]
/qemu/target/avr/
A Ddisas.c133 INSN(ADD, "r%d, r%d", a->rd, a->rr)
134 INSN(ADC, "r%d, r%d", a->rd, a->rr)
135 INSN(ADIW, "r%d:r%d, %d", a->rd + 1, a->rd, a->imm)
136 INSN(SUB, "r%d, r%d", a->rd, a->rr)
137 INSN(SUBI, "r%d, %d", a->rd, a->imm)
138 INSN(SBC, "r%d, r%d", a->rd, a->rr)
139 INSN(SBCI, "r%d, %d", a->rd, a->imm)
140 INSN(SBIW, "r%d:r%d, %d", a->rd + 1, a->rd, a->imm)
141 INSN(AND, "r%d, r%d", a->rd, a->rr)
142 INSN(ANDI, "r%d, %d", a->rd, a->imm)
[all …]
/qemu/target/mips/tcg/
A Dtx79_translate.c335 gen_base_offset_addr(ctx, addr, a->base, a->offset); in trans_LQ()
358 gen_base_offset_addr(ctx, addr, a->base, a->offset); in trans_SQ()
511 gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx); in trans_PEXTLW()
569 tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rt], cpu_gpr[a->rt], 16, 16); in trans_PCPYH()
570 tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rd], cpu_gpr[a->rd], 32, 32); in trans_PCPYH()
571 tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rt], cpu_gpr_hi[a->rt], 16, 16); in trans_PCPYH()
572 tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], 32, 32); in trans_PCPYH()
593 } else if (a->rd != a->rt) { in trans_PCPYLD()
594 tcg_gen_mov_i64(cpu_gpr[a->rd], cpu_gpr[a->rt]); in trans_PCPYLD()
608 gen_load_gpr_hi(cpu_gpr[a->rd], a->rs); in trans_PCPYUD()
[all …]
A Docteon_translate.c32 if (a->set) { in trans_BBIT()
48 if (a->rt == 0) { in trans_BADDU()
67 if (a->rt == 0) { in trans_DMUL()
85 if (a->rt == 0) { in trans_EXTS()
92 tcg_gen_sextract_tl(t0, t0, a->p, a->lenm1 + 1); in trans_EXTS()
101 if (a->rt == 0) { in trans_CINS()
108 tcg_gen_deposit_z_tl(t0, t0, a->p, a->lenm1 + 1); in trans_CINS()
117 if (a->rd == 0) { in trans_POP()
124 if (!a->dw) { in trans_POP()
147 if (a->ne) { in trans_SEQNE()
[all …]
/qemu/target/hexagon/
A Dfma_emu.c186 a.mant = int128_or(a.mant, int128_make64(a.guard)); in accum_norm_left()
187 a.guard = a.round; in accum_norm_left()
188 a.round = a.sticky; in accum_norm_left()
197 a.round | a.guard | int128_nz(a.mant); in accum_norm_right()
205 a.sticky |= a.round | a.guard | (int128_getlo(a.mant) != 0); in accum_norm_right()
214 a.sticky |= a.round; in accum_norm_right()
215 a.round = a.guard; in accum_norm_right()
395 && ((a.guard | a.round | a.sticky) == 0)) { \
429 a = accum_norm_right(a, 1 - a.exp); \
435 if (a.guard || a.round || a.sticky) { \
[all …]
/qemu/target/arm/tcg/
A Dtranslate-neon.c224 return do_neon_ddda_fpst(s, a->q * 7, a->vd, a->vn, a->vm, a->rot, in trans_VCMLA()
227 return do_neon_ddda_fpst(s, a->q * 7, a->vd, a->vn, a->vm, a->rot, in trans_VCMLA()
248 if ((a->vn | a->vm | a->vd) & a->q) { in trans_VCADD()
273 return do_neon_ddda(s, a->q * 7, a->vd, a->vn, a->vm, 0, in trans_VSDOT()
358 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VSDOT_scalar()
367 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VUDOT_scalar()
376 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VUSDOT_scalar()
385 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VSUDOT_scalar()
394 return do_neon_ddda_env(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VDOT_b16_scal()
797 if ((a->vn | a->vm | a->vd) & a->q) { in do_3same()
[all …]
A Dtranslate-mve.c158 if (a->rn == 15 || (a->rn == 13 && a->w)) { in do_ldst()
167 if (!a->a) { in do_ldst()
200 return do_ldst(s, a, ldstfns[a->size][a->l], a->size); in trans_VLDR_VSTR()
268 return do_ldst_sg(s, a, fns[a->os][a->msize][a->size]); in trans_VLDR_S_sg()
288 return do_ldst_sg(s, a, fns[a->os][a->msize][a->size]); in trans_VLDR_U_sg()
305 return do_ldst_sg(s, a, fns[a->os][a->msize][a->size]); in trans_VSTR_sg()
327 if (!a->a) { in do_ldst_sg_imm()
910 if (a->size == MO_32 && (a->qd == a->qm || a->qd == a->qn)) { in DO_2OP_VEC()
925 if (a->size == MO_32 && (a->qd == a->qm || a->qd == a->qn)) { in trans_VQDMULLT()
1101 if (a->qd == a->qn && a->size == MO_32) { in DO_2OP_SCALAR()
[all …]
A Dtranslate-sve.c1441 if (!a->s && a->pg == a->rn && a->rn == a->rm) { in trans_ORR_pppp()
2715 a->rd, a->rn, (a->rn + 1) % 32, a->pg, a->esz)
3387 dot_fns[a->u][a->sz], a->rd, a->rn, a->rm, a->ra, 0)
3505 a->rd, a->rn, a->rm, a->ra, (a->index << 2) | a->rot) in TRANS_FEAT()
3861 a->rd, a->rn, a->rm, a->pg, a->rot,
3885 a->rd, a->rn, a->rm, a->ra, a->pg, a->rot,
3892 a->rd, a->rn, a->rm, a->ra, a->index * 4 + a->rot,
5507 do_mem_zpz(s, a->rd, a->pg, a->rm, a->scale * a->msz, in trans_LD1_zprz()
7013 cmla_fns[a->esz], a->rd, a->rn, a->rm, a->ra, a->rot)
7019 cdot_fns[a->esz], a->rd, a->rn, a->rm, a->ra, a->rot)
[all …]
A Diwmmxt_helper.c49 #define EXTEND8H(a) ((uint16_t) (int8_t) (a)) argument
50 #define EXTEND8(a) ((uint32_t) (int8_t) (a)) argument
51 #define EXTEND16(a) ((uint32_t) (int16_t) (a)) argument
52 #define EXTEND16S(a) ((int32_t) (int16_t) (a)) argument
53 #define EXTEND32(a) ((uint64_t) (int32_t) (a)) argument
57 a = (( in HELPER()
69 a = (( in HELPER()
589 a = (((a >> 0) & 0xff) << 0) | (((a >> 16) & 0xff) << 8) | in HELPER()
603 a = (((a >> 0) & 0xffff) << 0) | (((a >> 32) & 0xffff) << 16) | in HELPER()
622 a = (((a >> 0) & 0xff) << 0) | (((a >> 16) & 0xff) << 8) | in HELPER()
[all …]
A Dtranslate-vfp.c325 ((a->vm | a->vn | a->vd) & 0x10)) { in trans_VSEL()
651 if (!mve_skip_vmov(s, a->vn, a->index, a->size)) { in trans_VMOV_to_gp()
696 if (!mve_skip_vmov(s, a->vn, a->index, a->size)) { in trans_VMOV_from_gp()
722 if (a->b && a->e) { in trans_VDUP()
2026 a->vd, a->vn, a->vm, false); in trans_VMINNM_hp()
2035 a->vd, a->vn, a->vm, false); in trans_VMAXNM_hp()
2044 a->vd, a->vn, a->vm, false); in trans_VMINNM_sp()
2053 a->vd, a->vn, a->vm, false); in trans_VMAXNM_sp()
2062 a->vd, a->vn, a->vm, false); in trans_VMINNM_dp()
2071 a->vd, a->vn, a->vm, false); in trans_VMAXNM_dp()
[all …]
/qemu/target/riscv/insn_trans/
A Dtrans_rvd.c.inc110 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
128 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
146 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
164 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
182 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
199 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
216 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
233 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
266 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
285 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
[all …]
A Dtrans_rvzfh.c.inc53 if (a->imm) {
59 dest = cpu_fpr[a->rd];
76 if (a->imm) {
97 gen_set_rm(ctx, a->rm);
114 gen_set_rm(ctx, a->rm);
131 gen_set_rm(ctx, a->rm);
148 gen_set_rm(ctx, a->rm);
242 if (a->rs1 == a->rs2) { /* FMOV */
286 if (a->rs1 == a->rs2) { /* FNEG */
333 if (a->rs1 == a->rs2) { /* FABS */
[all …]
A Dtrans_rvf.c.inc56 addr = get_address(ctx, a->rs1, a->imm);
57 dest = cpu_fpr[a->rd];
78 addr = get_address(ctx, a->rs1, a->imm);
105 gen_set_rm(ctx, a->rm);
122 gen_set_rm(ctx, a->rm);
139 gen_set_rm(ctx, a->rm);
156 gen_set_rm(ctx, a->rm);
172 gen_set_rm(ctx, a->rm);
250 if (a->rs1 == a->rs2) { /* FMOV */
293 if (a->rs1 == a->rs2) { /* FNEG */
[all …]
A Dtrans_xthead.c.inc164 if (a->lsb <= a->msb) {
165 f(dest, source, a->lsb, a->msb - a->lsb + 1);
350 TCGv addr = get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zext_offs);
370 TCGv addr = get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zext_offs);
562 if (a->rs1 == a->rd) {
566 int imm = a->imm5 << a->imm2;
586 int imm = a->imm5 << a->imm2;
744 TCGv addr = get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zext_offs);
761 TCGv addr = get_th_address_indexed(ctx, a->rs1, a->rs2, a->imm2, zext_offs);
910 if (a->rs == a->rd1 || a->rs == a->rd2 || a->rd1 == a->rd2) {
[all …]
A Dtrans_rvzfa.c.inc291 gen_set_rm(ctx, a->rm);
308 gen_set_rm(ctx, a->rm);
325 gen_set_rm(ctx, a->rm);
342 gen_set_rm(ctx, a->rm);
359 gen_set_rm(ctx, a->rm);
376 gen_set_rm(ctx, a->rm);
398 gen_set_gpr(ctx, a->rd, dst);
414 gen_set_gpr(ctx, a->rd, dst);
444 gen_set_gpr(ctx, a->rd, dest);
459 gen_set_gpr(ctx, a->rd, dest);
[all …]
/qemu/include/fpu/
A Dsoftfloat.h666 return float32_is_zero_or_denormal(a) && !float32_is_zero(a); in float32_is_denormal()
671 return float32_is_normal(a) || float32_is_zero(a); in float32_is_zero_or_normal()
865 return float64_is_normal(a) || float64_is_zero(a); in float64_is_zero_or_normal()
981 return a; in floatx80_abs()
987 return a; in floatx80_chs()
1007 return (a.high & 0x7fff) == 0 && a.low == 0; in floatx80_is_zero()
1017 return ((a.high & 0x7fff) == 0x7fff) && (a.low<<1); in floatx80_is_any_nan()
1265 return a; in float128_abs()
1271 return a; in float128_chs()
1286 return (a.high & 0x7fffffffffffffffLL) == 0 && a.low == 0; in float128_is_zero()
[all …]
/qemu/target/ppc/translate/
A Dfixedpoint-impl.c.inc236 gen_op_cmp32(cpu_gpr[a->ra], cpu_gpr[a->rb], s, a->bf);
242 gen_op_cmp(cpu_gpr[a->ra], cpu_gpr[a->rb], s, a->bf);
244 gen_op_cmp32(cpu_gpr[a->ra], cpu_gpr[a->rb], s, a->bf);
444 tcg_gen_muli_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], a->si);
865 tcg_gen_andi_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], shift ? a->ui << 16 : a->ui);
872 if (a->rt == a->ra && a->ui == 0) {
876 tcg_gen_ori_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], shift ? a->ui << 16 : a->ui);
882 if (a->rt == a->ra && a->ui == 0) {
886 tcg_gen_xori_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], shift ? a->ui << 16 : a->ui);
913 if (a->rt != a->ra || a->rt != a->rb) {
[all …]
/qemu/target/loongarch/
A Dvec.h33 #define DO_ADD(a, b) (a + b) argument
34 #define DO_SUB(a, b) (a - b) argument
35 #define DO_VAVG(a, b) ((a >> 1) + (b >> 1) + (a & b & 1)) argument
36 #define DO_VAVGR(a, b) ((a >> 1) + (b >> 1) + ((a | b) & 1)) argument
37 #define DO_VABSD(a, b) ((a > b) ? (a -b) : (b-a)) argument
38 #define DO_VABS(a) ((a < 0) ? (-a) : (a)) argument
39 #define DO_MIN(a, b) (a < b ? a : b) argument
40 #define DO_MAX(a, b) (a > b ? a : b) argument
41 #define DO_MUL(a, b) (a * b) argument
52 #define DO_SIGNCOV(a, b) (a == 0 ? 0 : a < 0 ? -b : b) argument
[all …]
/qemu/fpu/
A Dsoftfloat.c977 a->frac_hi = a->frac_lo = -1; in frac128_allones()
1010 a->frac_hi = a->frac_lo = 0; in frac128_clear()
1053 a0 = a->frac_hi, a1 = a->frac_lo; in frac128_div()
1123 a->frac = -a->frac; in frac64_neg()
1158 a->frac_hi = shl_double(a->frac_hi, a->frac_lo, shl); in frac128_normalize()
1281 a->sign = !a->sign; in frac64_modrem()
1370 a->sign = !a->sign; in frac128_modrem()
1572 r->frac_lo = a->frac_hm | ((a->frac_lm | a->frac_lo) != 0); in frac128_truncjam()
4011 a = int128_neg(a); in int128_to_float128()
4020 a = int128_lshift(a, shift); in int128_to_float128()
[all …]
/qemu/target/hppa/
A Dtranslate.c1706 return do_floadw(ctx, a->t, a->b, a->x, a->scale ? 2 : 0, in trans_fldw()
1731 return do_floadd(ctx, a->t, a->b, a->x, a->scale ? 3 : 0, in trans_fldd()
3306 return do_load(ctx, a->t, a->b, a->x, a->scale ? a->size : 0, in trans_ld()
3307 a->disp, a->sp, a->m, a->size | MO_TE); in trans_ld()
3316 return do_store(ctx, a->t, a->b, a->disp, a->sp, a->m, a->size | MO_TE); in trans_st()
3513 a->c, a->f, a->d, a->n, a->disp); in trans_cmpb()
3523 a->c, a->f, a->d, a->n, a->disp); in trans_cmpbi()
3573 return do_addb(ctx, a->r2, load_gpr(ctx, a->r1), a->c, a->f, a->n, a->disp); in trans_addb()
3579 return do_addb(ctx, a->r, tcg_constant_i64(a->i), a->c, a->f, a->n, a->disp); in trans_addbi()
3939 return do_dep_sar(ctx, a->t, a->c, a->d, a->nz, a->len, in trans_dep_sar()
[all …]

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