Searched refs:cmask (Results 1 – 13 of 13) sorted by relevance
| /qemu/target/riscv/ |
| A D | pmu.c | 37 void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name) in riscv_pmu_generate_fdt_node() argument
55 fdt_event_ctr_map[2] = cpu_to_be32(cmask | 1 << 0); in riscv_pmu_generate_fdt_node()
60 fdt_event_ctr_map[5] = cpu_to_be32(cmask | 1 << 2); in riscv_pmu_generate_fdt_node()
65 fdt_event_ctr_map[8] = cpu_to_be32(cmask); in riscv_pmu_generate_fdt_node()
70 fdt_event_ctr_map[11] = cpu_to_be32(cmask); in riscv_pmu_generate_fdt_node()
75 fdt_event_ctr_map[14] = cpu_to_be32(cmask); in riscv_pmu_generate_fdt_node()
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| A D | pmu.h | 34 void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name);
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| /qemu/hw/pci/ |
| A D | pci.c | 872 dev->cmask[PCI_STATUS] = PCI_STATUS_CAP_LIST; in pci_init_cmask()
873 dev->cmask[PCI_REVISION_ID] = 0xff; in pci_init_cmask()
874 dev->cmask[PCI_CLASS_PROG] = 0xff; in pci_init_cmask()
876 dev->cmask[PCI_HEADER_TYPE] = 0xff; in pci_init_cmask()
877 dev->cmask[PCI_CAPABILITY_LIST] = 0xff; in pci_init_cmask()
956 d->cmask[PCI_IO_BASE] |= PCI_IO_RANGE_TYPE_MASK; in pci_init_mask_bridge()
1026 pci_dev->cmask = g_malloc0(config_size); in pci_config_alloc()
1035 g_free(pci_dev->cmask); in pci_config_free()
1362 pci_set_quad(pci_dev->cmask + addr, ~0ULL); in pci_register_bar()
2486 memset(pdev->cmask + offset, 0xFF, size); in pci_add_capability()
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| A D | slotid_cap.c | 35 d->cmask[cap + PCI_SID_ESR] = 0xff; in slotid_cap_init()
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| A D | pcie.c | 74 uint8_t *cmask = dev->cmask + dev->exp.exp_cap; in pcie_cap_v1_fill() local
111 pci_set_word(cmask + PCI_EXP_LNKSTA, 0); in pcie_cap_v1_fill()
729 pci_word_test_and_clear_mask(dev->cmask + pos + PCI_EXP_SLTSTA, in pcie_cap_slot_init()
1085 memset(dev->cmask + offset, 0xFF, size); in pcie_add_capability()
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| A D | pcie_sriov.c | 100 pci_set_quad(dev->cmask + addr, ~0ULL); in pcie_sriov_pf_init_vf_bar()
103 pci_set_long(dev->cmask + addr, 0xffffffff); in pcie_sriov_pf_init_vf_bar()
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| A D | shpc.c | 669 shpc->cmask = g_malloc0(SHPC_SIZEOF(d)); in shpc_init()
740 g_free(shpc->cmask); in shpc_free()
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| A D | pcie_aer.c | 755 pci_set_long(dev->cmask + pos + PCI_ERR_ROOT_STATUS, in pcie_aer_root_init()
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| /qemu/include/hw/pci/ |
| A D | shpc.h | 21 uint8_t *cmask; member
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| A D | pci_device.h | 69 uint8_t *cmask; member
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| /qemu/target/sparc/ |
| A D | insns.decode | 92 MEMBAR 10 00000 101000 01111 1 000000 cmask:3 mmask:4
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| A D | translate.c | 2831 if (a->cmask) { in trans_MEMBAR()
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| /qemu/hw/vfio/ |
| A D | pci.c | 2154 memset(pdev->cmask + pos + 3, 0, size - 3); in vfio_add_vendor_specific_cap()
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