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/qemu/target/arm/tcg/
A Dcpu32.c28 t = cpu->isar.id_isar5; in aa32_max_features()
47 t = cpu->isar.mvfr1; in aa32_max_features()
50 cpu->isar.mvfr1 = t; in aa32_max_features()
52 t = cpu->isar.mvfr2; in aa32_max_features()
55 cpu->isar.mvfr2 = t; in aa32_max_features()
148 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1); in arm926_initfn()
149 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSP, 1); in arm926_initfn()
150 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPDP, 1); in arm926_initfn()
190 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1); in arm1026_initfn()
191 cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSP, 1); in arm1026_initfn()
[all …]
A Dcpu-v7m.c23 ARMCPU *cpu = ARM_CPU(cs); in arm_v7m_cpu_exec_interrupt() local
24 CPUARMState *env = &cpu->env; in arm_v7m_cpu_exec_interrupt()
52 cpu->midr = 0x410cc200; in cortex_m0_initfn()
85 cpu->midr = 0x410fc231; in cortex_m3_initfn()
86 cpu->pmsav7_dregion = 8; in cortex_m3_initfn()
113 cpu->pmsav7_dregion = 8; in cortex_m4_initfn()
175 cpu->sau_sregion = 8; in cortex_m33_initfn()
195 cpu->ctr = 0x8000c000; in cortex_m33_initfn()
209 cpu->revidr = 0; in cortex_m55_initfn()
211 cpu->sau_sregion = 8; in cortex_m55_initfn()
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A Dcpu64.c49 cpu->revidr = 0; in aarch64_a35_initfn()
54 cpu->id_afr0 = 0; in aarch64_a35_initfn()
249 cpu->revidr = 0; in aarch64_a55_initfn()
380 cpu->revidr = 0; in aarch64_a76_initfn()
719 cpu->ccsidr[1] = cpu->ccsidr[0]; in aarch64_neoverse_v1_initfn()
960 cpu->ccsidr[1] = cpu->ccsidr[0]; in aarch64_a710_initfn()
1061 cpu->ccsidr[1] = cpu->ccsidr[0]; in aarch64_neoverse_n2_initfn()
1115 cpu->midr = t; in aarch64_max_tcg_initfn()
1121 u = cpu->clidr; in aarch64_max_tcg_initfn()
1131 t = cpu->ctr; in aarch64_max_tcg_initfn()
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/qemu/tests/tcg/mips/user/ase/msa/
A Dtest_msa_run_32r5eb.sh8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5eb
9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5eb
10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5eb
11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5eb
12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5eb
13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5eb
14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5eb
15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5eb
16 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_b_32r5eb
17 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_h_32r5eb
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A Dtest_msa_run_32r5el.sh8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5el
9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5el
10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5el
11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5el
12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5el
13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5el
14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5el
15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5el
16 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_b_32r5el
17 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_h_32r5el
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A Dtest_msa_run_64r6eb.sh8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6eb
9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6eb
10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6eb
11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6eb
12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6eb
13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6eb
14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6eb
15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6eb
16 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6eb
17 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6eb
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A Dtest_msa_run_64r6el.sh8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6el
9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6el
10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6el
11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6el
12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6el
13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6el
14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6el
15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6el
16 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6el
17 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6el
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/qemu/target/arm/
A Dcpu64.c70 cpu->sve_vq.supported = kvm_arm_sve_get_vls(cpu); in arm_cpu_sve_finalize()
89 if (cpu->sve_max_vq && max_vq > cpu->sve_max_vq) { in arm_cpu_sve_finalize()
523 if (cpu->prop_pauth_impdef && cpu->prop_pauth_qarma3) { in arm_cpu_pauth_finalize()
539 } else if (cpu->prop_pauth_impdef || cpu->prop_pauth_qarma3) { in arm_cpu_pauth_finalize()
572 cpu->prop_pauth = cpu_isar_feature(aa64_pauth, cpu); in aarch64_add_pauth_properties()
587 if (!cpu->prop_lpa2) { in arm_cpu_lpa2_finalize()
620 cpu->ctr = 0x8444c004; in aarch64_a57_initfn()
653 cpu->gic_num_lrs = 4; in aarch64_a57_initfn()
656 cpu->gic_pribits = 5; in aarch64_a57_initfn()
714 cpu->gic_num_lrs = 4; in aarch64_a53_initfn()
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A Dcpu.c248 g_hash_table_foreach(cpu->cp_regs, cp_reg_reset, cpu); in arm_cpu_reset_hold()
249 g_hash_table_foreach(cpu->cp_regs, cp_reg_check_reset, cpu); in arm_cpu_reset_hold()
1524 qdev_init_gpio_out(DEVICE(cpu), cpu->gt_timer_outputs, in arm_cpu_initfn()
1529 qdev_init_gpio_out_named(DEVICE(cpu), &cpu->pmu_interrupt, in arm_cpu_initfn()
2104 cpu->ctr = FIELD_DP64(cpu->ctr, CTR_EL0, DIC, 0); in arm_cpu_realizefn()
2108 cpu->has_vfp != cpu->has_neon) { in arm_cpu_realizefn()
2118 if (cpu->has_vfp_d32 != cpu->has_neon) { in arm_cpu_realizefn()
2229 if (!cpu->has_neon && !cpu->has_vfp) { in arm_cpu_realizefn()
2345 cpu->isar.id_aa64pfr0 = FIELD_DP64(cpu->isar.id_aa64pfr0, in arm_cpu_realizefn()
2387 cpu->isar.id_pfr1 = FIELD_DP32(cpu->isar.id_pfr1, in arm_cpu_realizefn()
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/qemu/accel/tcg/
A Dtcg-accel-ops-rr.c43 CPUState *cpu; in rr_kick_vcpu_thread() local
73 CPUState *cpu; in rr_kick_next_cpu() local
76 if (cpu) { in rr_kick_next_cpu()
110 CPUState *cpu; in rr_wait_io_event() local
130 CPUState *cpu; in rr_deal_with_unplugged_cpus() local
133 if (cpu->unplug && !cpu_can_run(cpu)) { in rr_deal_with_unplugged_cpus()
157 CPUState *cpu; in rr_cpu_count() local
245 while (cpu && cpu_work_list_empty(cpu) && !cpu->exit_request) { in rr_cpu_thread_fn()
278 cpu = CPU_NEXT(cpu); in rr_cpu_thread_fn()
283 cpu = CPU_NEXT(cpu); in rr_cpu_thread_fn()
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A Dcpu-exec.c74 cpu_icount = cpu->icount_extra + cpu->neg.icount_decr.u16.low; in align_clocks()
125 = cpu->icount_extra + cpu->neg.icount_decr.u16.low; in init_delay_params()
454 log_cpu_exec(log_pc(cpu, itb), cpu, itb); in cpu_tb_exec()
504 if (unlikely(cpu->singlestep_enabled) && cpu->exception_index == -1) { in cpu_tb_exec()
716 && cpu->neg.icount_decr.u16.low + cpu->icount_extra == 0) { in cpu_handle_exception()
718 cpu->cflags_next_tb = (curr_cflags(cpu) & ~CF_USE_ICOUNT) in cpu_handle_exception()
784 return cpu->neg.icount_decr.u16.low + cpu->icount_extra == 0; in icount_exit_request()
795 if (cpu->cflags_next_tb != -1 && cpu->cflags_next_tb & CF_NOIRQ) { in cpu_handle_interrupt()
934 cpu->icount_extra = cpu->icount_budget - insns_left; in cpu_loop_exec_tb()
1086 tlb_init(cpu); in tcg_exec_realizefn()
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A Dtcg-accel-ops-mttcg.c41 CPUState *cpu; member
50 CPUState *cpu = container_of(notify, MttcgForceRcuNotifier, notifier)->cpu; in mttcg_force_rcu() local
68 CPUState *cpu = arg; in mttcg_cpu_thread_fn() local
75 force_rcu.cpu = cpu; in mttcg_cpu_thread_fn()
83 cpu->neg.can_do_io = true; in mttcg_cpu_thread_fn()
84 current_cpu = cpu; in mttcg_cpu_thread_fn()
89 cpu->exit_request = 1; in mttcg_cpu_thread_fn()
119 } while (!cpu->unplug || cpu_can_run(cpu)); in mttcg_cpu_thread_fn()
121 tcg_cpu_destroy(cpu); in mttcg_cpu_thread_fn()
130 cpu_exit(cpu); in mttcg_kick_vcpu_thread()
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/qemu/target/i386/hvf/
A Dx86.h229 #define AX(cpu) RX(cpu, R_EAX) argument
230 #define CX(cpu) RX(cpu, R_ECX) argument
231 #define DX(cpu) RX(cpu, R_EDX) argument
232 #define BP(cpu) RX(cpu, R_EBP) argument
233 #define SP(cpu) RX(cpu, R_ESP) argument
234 #define BX(cpu) RX(cpu, R_EBX) argument
235 #define SI(cpu) RX(cpu, R_ESI) argument
236 #define DI(cpu) RX(cpu, R_EDI) argument
239 #define AL(cpu) RL(cpu, R_EAX) argument
240 #define CL(cpu) RL(cpu, R_ECX) argument
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A Dhvf.c217 cpus_kick_thread(cpu); in hvf_kick_vcpu_thread()
315 x86cpu = X86_CPU(cpu); in hvf_arch_init_vcpu()
457 vmx_update_tpr(cpu); in hvf_vcpu_exec()
460 if (!cpu_is_bsp(X86_CPU(cpu)) && cpu->halted) { in hvf_vcpu_exec()
483 current_cpu = cpu; in hvf_vcpu_exec()
560 load_regs(cpu); in hvf_vcpu_exec()
564 store_regs(cpu); in hvf_vcpu_exec()
617 load_regs(cpu); in hvf_vcpu_exec()
624 store_regs(cpu); in hvf_vcpu_exec()
631 load_regs(cpu); in hvf_vcpu_exec()
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A Dx86.c118 bool x86_is_protected(CPUState *cpu) in x86_is_protected() argument
124 bool x86_is_real(CPUState *cpu) in x86_is_real() argument
126 return !x86_is_protected(cpu); in x86_is_real()
129 bool x86_is_v8086(CPUState *cpu) in x86_is_v8086() argument
131 X86CPU *x86_cpu = X86_CPU(cpu); in x86_is_v8086()
136 bool x86_is_long_mode(CPUState *cpu) in x86_is_long_mode() argument
141 bool x86_is_long64_mode(CPUState *cpu) in x86_is_long64_mode() argument
149 bool x86_is_paging_mode(CPUState *cpu) in x86_is_paging_mode() argument
155 bool x86_is_pae_enabled(CPUState *cpu) in x86_is_pae_enabled() argument
179 return linear_addr(cpu, addr, seg); in linear_addr_size()
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/qemu/system/
A Dcpus.c88 if (cpu->stop || !cpu_work_list_empty(cpu)) { in cpu_thread_is_idle()
94 if (!cpu->halted || cpu_has_work(cpu)) { in cpu_thread_is_idle()
105 CPUState *cpu; in all_cpu_threads_idle() local
119 CPUState *cpu; in hw_error() local
135 CPUState *cpu; in cpu_synchronize_all_states() local
144 CPUState *cpu; in cpu_synchronize_all_post_reset() local
153 CPUState *cpu; in cpu_synchronize_all_post_init() local
162 CPUState *cpu; in cpu_synchronize_all_pre_loadvm() local
590 CPUState *cpu; in all_vcpus_paused() local
603 CPUState *cpu; in pause_all_vcpus() local
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/qemu/hw/core/
A Dcpu-common.c40 CPUState *cpu; in cpu_by_arch_id() local
42 CPU_FOREACH(cpu) { in cpu_by_arch_id()
46 return cpu; in cpu_by_arch_id()
66 return cpu; in cpu_create()
130 cpu->halted = cpu->start_powered_off; in cpu_common_reset_hold()
131 cpu->mem_io_pc = 0; in cpu_common_reset_hold()
216 cpu_resume(cpu); in cpu_common_realizefn()
241 gdb_init_cpu(cpu); in cpu_common_initfn()
246 cpu->nr_cores = 1; in cpu_common_initfn()
247 cpu->nr_threads = 1; in cpu_common_initfn()
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A Dcpu-sysemu.c26 bool cpu_paging_enabled(const CPUState *cpu) in cpu_paging_enabled() argument
28 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_paging_enabled()
40 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_get_memory_mapping()
53 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_get_phys_page_attrs_debug()
75 ret = cpu->cc->sysemu_ops->asidx_from_attrs(cpu, attrs); in cpu_asidx_from_attrs()
84 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_write_elf32_qemunote()
95 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_write_elf32_note()
106 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_write_elf64_qemunote()
117 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_write_elf64_note()
127 CPUClass *cc = CPU_GET_CLASS(cpu); in cpu_virtio_is_big_endian()
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/qemu/
A Dcpu-common.c82 void cpu_list_add(CPUState *cpu) in cpu_list_add() argument
113 CPUState *cpu; in qemu_get_cpu() local
115 CPU_FOREACH(cpu) { in qemu_get_cpu()
117 return cpu; in qemu_get_cpu()
141 qemu_cpu_kick(cpu); in queue_work_on_cpu()
149 if (qemu_cpu_is_self(cpu)) { in do_run_on_cpu()
150 func(cpu, data); in do_run_on_cpu()
160 queue_work_on_cpu(cpu, &wi); in do_run_on_cpu()
178 queue_work_on_cpu(cpu, wi); in async_run_on_cpu()
272 if (!cpu->has_waiter) { in cpu_exec_start()
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/qemu/target/riscv/tcg/
A Dtcg-cpu.c521 if (cpu->cfg.ext_zvfh && !cpu->cfg.ext_zfhmin) { in riscv_cpu_validate_set_extensions()
536 if ((cpu->cfg.ext_zdinx || cpu->cfg.ext_zhinxmin) && !cpu->cfg.ext_zfinx) { in riscv_cpu_validate_set_extensions()
553 if (cpu->cfg.ext_zcmop && !cpu->cfg.ext_zca) { in riscv_cpu_validate_set_extensions()
573 if ((cpu->cfg.ext_zcf || cpu->cfg.ext_zcd || cpu->cfg.ext_zcb || in riscv_cpu_validate_set_extensions()
574 cpu->cfg.ext_zcmp || cpu->cfg.ext_zcmt) && !cpu->cfg.ext_zca) { in riscv_cpu_validate_set_extensions()
580 if (cpu->cfg.ext_zcd && (cpu->cfg.ext_zcmp || cpu->cfg.ext_zcmt)) { in riscv_cpu_validate_set_extensions()
586 if (cpu->cfg.ext_zcmt && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
591 if ((cpu->cfg.ext_zvbb || cpu->cfg.ext_zvkb || cpu->cfg.ext_zvkg || in riscv_cpu_validate_set_extensions()
592 cpu->cfg.ext_zvkned || cpu->cfg.ext_zvknha || cpu->cfg.ext_zvksed || in riscv_cpu_validate_set_extensions()
599 if ((cpu->cfg.ext_zvbc || cpu->cfg.ext_zvknhb) && !cpu->cfg.ext_zve64x) { in riscv_cpu_validate_set_extensions()
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/qemu/hw/intc/
A Darm_gic.c145 int cpu_iface = virt ? (cpu + GIC_NCPU) : cpu; in gic_irq_signaling_enabled()
174 for (cpu = 0; cpu < s->num_cpu; cpu++) { in gic_update_internal()
175 cpu_iface = virt ? (cpu + GIC_NCPU) : cpu; in gic_update_internal()
335 int cpu = 0; in gic_update_maintenance() local
338 for (cpu = 0; cpu < s->num_cpu; cpu++) { in gic_update_maintenance()
398 int cpu; in gic_set_irq() local
520 uint32_t apr = s->apr[i][cpu] | s->nsapr[i][cpu]; in gic_get_prio_from_apr_bits()
709 s->priority_mask[cpu] = pmask & gic_fullprio_mask(s, cpu); in gic_set_priority_mask()
833 if (gic_is_vcpu(cpu) && !gic_virq_is_valid(s, irq, cpu)) { in gic_deactivate_irq()
950 int cpu; in gic_dist_readb() local
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/qemu/target/microblaze/
A Dcpu.c85 cpu->env.pc = value; in mb_cpu_set_pc()
87 cpu->env.iflags = 0; in mb_cpu_set_pc()
94 return cpu->env.pc; in mb_cpu_get_pc()
103 cpu->env.pc = tb->pc; in mb_cpu_synchronize_from_tb()
113 cpu->env.pc = data[0]; in mb_restore_state_to_opc()
242 if (cpu->cfg.addr_size < 32 || cpu->cfg.addr_size > 64) { in mb_cpu_realizefn()
250 version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION; in mb_cpu_realizefn()
277 cpu->cfg.pvr_regs[1] = cpu->cfg.pvr_user2; in mb_cpu_realizefn()
307 cpu->cfg.pvr_regs[11] = ((cpu->cfg.use_mmu ? PVR11_USE_MMU : 0) | in mb_cpu_realizefn()
310 cpu->cfg.mmu = 3; in mb_cpu_realizefn()
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/qemu/include/hw/core/
A Dcpu.h162 vaddr (*get_pc)(CPUState *cpu);
595 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node) argument
596 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus_queue, node) argument
759 void cpu_list_add(CPUState *cpu);
771 void cpu_reset(CPUState *cpu);
832 return cc->has_work(cpu); in cpu_has_work()
973 cc->set_pc(cpu, addr); in cpu_set_pc()
991 void cpu_exit(CPUState *cpu);
999 void cpu_pause(CPUState *cpu);
1007 void cpu_resume(CPUState *cpu);
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/qemu/hw/openrisc/
A Dcputimer.c55 if (!cpu->env.is_counting) { in cpu_openrisc_count_update()
69 if (!cpu->env.is_counting) { in cpu_openrisc_timer_update()
88 cpu->env.is_counting = 1; in cpu_openrisc_count_start()
94 timer_del(cpu->env.timer); in cpu_openrisc_count_stop()
96 cpu->env.is_counting = 0; in cpu_openrisc_count_stop()
101 OpenRISCCPU *cpu = opaque; in openrisc_timer_cb() local
126 qemu_cpu_kick(CPU(cpu)); in openrisc_timer_cb()
132 OpenRISCCPU *cpu = opaque; in openrisc_count_reset() local
134 if (cpu->env.is_counting) { in openrisc_count_reset()
143 OpenRISCCPU *cpu = opaque; in openrisc_timer_reset() local
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/qemu/target/s390x/
A Dcpu-sysemu.c45 S390CPU *cpu = S390_CPU(s); in s390_cpu_load_normal() local
69 S390CPU *cpu = opaque; in s390_cpu_machine_reset_cb() local
118 cpu->env.tod_timer = in s390_cpu_init_sysemu()
120 cpu->env.cpu_timer = in s390_cpu_init_sysemu()
145 CPU(cpu)->cpu_index = cpu->env.core_id; in s390_cpu_realize_sysemu()
157 g_free(cpu->irqstate); in s390_cpu_finalize()
177 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & in disabled_wait()
183 CPUState *cpu; in s390_count_running_cpus() local
186 CPU_FOREACH(cpu) { in s390_count_running_cpus()
201 CPUState *cs = CPU(cpu); in s390_cpu_halt()
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