| /qemu/accel/tcg/ |
| A D | cpu-exec.c | 181 uint64_t cs_base; member 195 tb->cs_base == desc->cs_base && in tb_lookup_cmp() 234 desc.cs_base = cs_base; in tb_htable_lookup() 244 flags, cs_base, cflags); in tb_htable_lookup() 266 tb->cs_base == cs_base && in tb_lookup() 406 uint64_t cs_base; in HELPER() local 417 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); in HELPER() 424 tb = tb_lookup(cpu, pc, cs_base, flags, cflags); in HELPER() 573 uint64_t cs_base; in cpu_exec_step_atomic() local 597 tb = tb_lookup(cpu, pc, cs_base, flags, cflags); in cpu_exec_step_atomic() [all …]
|
| A D | translate-all.c | 288 vaddr pc, uint64_t cs_base, in tb_gen_code() argument 332 tb->cs_base = cs_base; in tb_gen_code() 583 uint64_t cs_base; in tb_check_watchpoint() local 587 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); in tb_check_watchpoint()
|
| A D | internal-common.h | 47 uint64_t cs_base, uint32_t flags,
|
| A D | tb-maint.c | 52 a->cs_base == b->cs_base && in tb_cmp() 921 tb->flags, tb->cs_base, orig_cflags); in do_tb_phys_invalidate() 988 tb->flags, tb->cs_base, tb->cflags); in tb_link_page()
|
| /qemu/target/hppa/ |
| A D | cpu.c | 54 uint64_t cs_base = 0; in cpu_get_tb_cpu_state() local 72 cs_base |= CS_BASE_DIFFSPACE; in cpu_get_tb_cpu_state() 74 cs_base |= CS_BASE_DIFFPAGE; in cpu_get_tb_cpu_state() 76 cs_base |= env->iaoq_b & ~TARGET_PAGE_MASK; in cpu_get_tb_cpu_state() 94 *pcsbase = cs_base; in cpu_get_tb_cpu_state()
|
| A D | cpu.h | 347 uint64_t *cs_base, uint32_t *pflags);
|
| /qemu/target/i386/tcg/ |
| A D | tcg-cpu.c | 59 env->eip = (uint32_t)(tb->pc - tb->cs_base); in x86_cpu_synchronize_from_tb() 80 uint64_t pc = env->eip + tb->cs_base; in x86_restore_state_to_opc() 88 env->eip = (uint32_t)(new_pc - tb->cs_base); in x86_restore_state_to_opc()
|
| A D | translate.c | 87 target_ulong cs_base; /* base of CS segment */ member 539 tcg_gen_movi_tl(cpu_eip, (uint32_t)(s->pc - s->cs_base)); in gen_update_eip_next() 552 tcg_gen_movi_tl(cpu_eip, (uint32_t)(s->base.pc_next - s->cs_base)); in gen_update_eip_cur() 587 return tcg_constant_i32(s->pc - s->cs_base); in eip_next_i32() 601 return tcg_constant_tl((uint32_t)(s->pc - s->cs_base)); in eip_next_tl() 615 return tcg_constant_tl((uint32_t)(s->base.pc_next - s->cs_base)); in eip_cur_tl() 2204 target_ulong new_eip = new_pc - s->cs_base; in gen_jmp_rel() 2233 new_pc = (uint32_t)(new_eip + s->cs_base); in gen_jmp_rel() 3631 dc->cs_base = dc->base.tb->cs_base; in i386_tr_init_disas_context()
|
| /qemu/target/hexagon/ |
| A D | cpu.h | 142 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 146 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/avr/ |
| A D | cpu.h | 195 uint64_t *cs_base, uint32_t *pflags) in cpu_get_tb_cpu_state() argument 200 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/rx/ |
| A D | cpu.h | 153 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 156 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/tricore/ |
| A D | cpu.h | 257 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 261 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/xtensa/ |
| A D | cpu.h | 735 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 738 *cs_base = 0; in cpu_get_tb_cpu_state() 764 *cs_base = lend_dist; in cpu_get_tb_cpu_state() 766 *cs_base |= lbeg_off << XTENSA_CSBASE_LBEG_OFF_SHIFT; in cpu_get_tb_cpu_state()
|
| /qemu/include/exec/ |
| A D | translation-block.h | 64 uint64_t cs_base; member
|
| /qemu/target/openrisc/ |
| A D | cpu.h | 353 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 356 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/microblaze/ |
| A D | cpu.h | 416 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 420 *cs_base = (*flags & IMM_FLAG ? env->imm : 0); in cpu_get_tb_cpu_state()
|
| /qemu/target/alpha/ |
| A D | cpu.h | 466 uint64_t *cs_base, uint32_t *pflags) in cpu_get_tb_cpu_state() argument 469 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/m68k/ |
| A D | cpu.h | 609 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 612 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/s390x/ |
| A D | cpu.c | 324 uint64_t *cs_base, uint32_t *pflags) in cpu_get_tb_cpu_state() argument 338 *cs_base = env->ex_value; in cpu_get_tb_cpu_state()
|
| /qemu/target/sh4/ |
| A D | cpu.h | 384 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 388 *cs_base = env->flags & TB_FLAG_GUSA_MASK ? env->gregs[0] : 0; in cpu_get_tb_cpu_state()
|
| /qemu/hw/sparc/ |
| A D | sun4m.c | 96 hwaddr tcx_base, cs_base, apc_base, aux1_base, aux2_base; member 1028 if (hwdef->cs_base) { in sun4m_hw_init() 1029 sysbus_create_simple("sun-CS4231", hwdef->cs_base, in sun4m_hw_init() 1131 .cs_base = 0x6c000000, in ss5_class_init() 1350 .cs_base = 0x6c000000, in ss4_class_init()
|
| /qemu/target/loongarch/ |
| A D | cpu.h | 475 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 478 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/ppc/ |
| A D | helper_regs.c | 260 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 266 *cs_base = 0; in cpu_get_tb_cpu_state()
|
| /qemu/target/sparc/ |
| A D | cpu.h | 751 uint64_t *cs_base, uint32_t *pflags) in cpu_get_tb_cpu_state() argument 755 *cs_base = env->npc; in cpu_get_tb_cpu_state()
|
| /qemu/target/mips/ |
| A D | cpu.h | 1372 uint64_t *cs_base, uint32_t *flags) in cpu_get_tb_cpu_state() argument 1375 *cs_base = 0; in cpu_get_tb_cpu_state()
|