| /qemu/target/s390x/ |
| A D | cpu_models.h | 24 uint8_t gen; /* hw generation identification */ member 76 void s390_cpudef_featoff(uint8_t gen, uint8_t ec_ga, S390Feat feat); 77 void s390_cpudef_featoff_greater(uint8_t gen, uint8_t ec_ga, S390Feat feat); 78 void s390_cpudef_group_featoff_greater(uint8_t gen, uint8_t ec_ga, 87 if (model->def->gen >= S390_GEN_Z10) { in s390_ibc_from_cpu_model() 88 ibc = ((model->def->gen - S390_GEN_Z10) << 4) + model->def->ec_ga; in s390_ibc_from_cpu_model() 112 (model->def->gen == 7 ? 0 : (uint64_t)model->cpu_id_format << 15); in s390_cpuid_from_cpu_model() 114 S390CPUDef const *s390_find_cpu_def(uint16_t type, uint8_t gen, uint8_t ec_ga,
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| A D | cpu_models_sysemu.c | 33 if (max_model->def->gen < model->def->gen || in check_unavailable_features() 34 (max_model->def->gen == model->def->gen && in check_unavailable_features() 289 if (modela.def->gen == modelb.def->gen) { in qmp_query_cpu_model_comparison() 298 } else if (modela.def->gen < modelb.def->gen) { in qmp_query_cpu_model_comparison() 369 if (modela.def->gen == modelb.def->gen) { in qmp_query_cpu_model_baseline() 375 max_gen = modela.def->gen; in qmp_query_cpu_model_baseline() 377 } else if (modela.def->gen > modelb.def->gen) { in qmp_query_cpu_model_baseline() 379 max_gen = modelb.def->gen; in qmp_query_cpu_model_baseline() 383 max_gen = modela.def->gen; in qmp_query_cpu_model_baseline()
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| A D | cpu_models.c | 122 if (def->gen < gen) { in s390_cpudef_featoff_greater() 125 if (def->gen == gen && def->ec_ga < ec_ga) { in s390_cpudef_featoff_greater() 145 if (cpu_def->gen < gen) { in s390_cpudef_group_featoff_greater() 148 if (cpu_def->gen == gen && cpu_def->ec_ga < ec_ga) { in s390_cpudef_group_featoff_greater() 293 if (!gen) { in s390_find_cpu_def() 296 if (!gen && type) { in s390_find_cpu_def() 305 if (gen) { in s390_find_cpu_def() 306 if (def->gen > gen) { in s390_find_cpu_def() 308 } else if (def->gen == gen && ec_ga && def->ec_ga > ec_ga) { in s390_find_cpu_def() 529 if (model->def->gen > max_model->def->gen) { in check_compatibility() [all …]
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| A D | meson.build | 11 gen_features = executable('gen-features', 'gen-features.c', native: true, 14 gen_features_h = custom_target('gen-features.h', 15 output: 'gen-features.h',
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| /qemu/hw/vfio/ |
| A D | igd.c | 271 if (gen > 6) { in vfio_igd_gtt_max() 449 int gen; in vfio_probe_igd_bar0_quirk() local 467 gen = igd_gen(vdev); in vfio_probe_igd_bar0_quirk() 468 if (gen < 11) { in vfio_probe_igd_bar0_quirk() 488 if (gen < 8) { in igd_get_stolen_mb() 494 if (gen < 9) { in igd_get_stolen_mb() 554 gen = igd_gen(vdev); in vfio_probe_igd_bar4_quirk() 555 if (gen == -1) { in vfio_probe_igd_bar4_quirk() 658 if (gen < 11) { in vfio_probe_igd_bar4_quirk() 681 if (gen > 6) { in vfio_probe_igd_bar4_quirk() [all …]
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| /qemu/tests/qapi-schema/ |
| A D | qapi-schema-test.out | 35 gen=True success_response=True boxed=False oob=False preconfig=False 178 gen=True success_response=True boxed=False oob=False preconfig=False 182 gen=True success_response=True boxed=False oob=False preconfig=False 187 gen=True success_response=True boxed=False oob=False preconfig=False 196 gen=True success_response=True boxed=False oob=False preconfig=False 200 gen=True success_response=True boxed=False oob=False preconfig=False 202 gen=True success_response=True boxed=True oob=False preconfig=False 204 gen=True success_response=True boxed=True oob=False preconfig=False 206 gen=True success_response=True boxed=True oob=False preconfig=False 208 gen=True success_response=True boxed=False oob=True preconfig=True [all …]
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| A D | type-bypass-bad-gen.err | 1 type-bypass-bad-gen.json: In command 'foo': 2 type-bypass-bad-gen.json:2: flag 'gen' may only use false value
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| A D | type-bypass-bad-gen.json | 1 # 'gen' should only appear with value false 2 { 'command': 'foo', 'gen': 'whatever' }
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| A D | indented-expr.out | 13 gen=True success_response=True boxed=False oob=False preconfig=False 15 gen=True success_response=True boxed=False oob=False preconfig=False
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| /qemu/hw/net/ |
| A D | vmxnet3.h | 236 u32 gen:1; /* generation bit */ member 240 u32 gen:1; /* generation bit */ 322 u32 gen:1; /* generation bit */ member 328 u32 gen:1; /* generation bit */ 340 u32 gen:1; /* Generation bit */ member 350 u32 gen:1; /* Generation bit */ 414 u32 gen:1; /* generation bit */ member 436 u32 gen:1; /* generation bit */ 771 #define VMXNET3_FLIP_RING_GEN(gen) ((gen) = (gen) ^ 0x1) argument
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| /qemu/scripts/qapi/ |
| A D | common.py | 214 gen = gen_infix(all_operator, ifcond['all']) 216 gen = gen_infix(any_operator, ifcond['any']) 218 gen = '(' + gen + ')' 219 return gen
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| /qemu/tcg/ |
| A D | tcg-op-ldst.c | 913 gen_atomic_cx_i32 gen; in tcg_gen_atomic_cmpxchg_i32_int() local 924 tcg_debug_assert(gen != NULL); in tcg_gen_atomic_cmpxchg_i32_int() 1001 gen_atomic_cx_i64 gen; in tcg_gen_atomic_cmpxchg_i64_int() local 1005 if (gen) { in tcg_gen_atomic_cmpxchg_i64_int() 1119 gen_atomic_cx_i128 gen; in tcg_gen_atomic_cmpxchg_i128_int() local 1127 if (gen) { in tcg_gen_atomic_cmpxchg_i128_int() 1167 gen(t2, t1, t2); in do_nonatomic_op_i32() 1178 gen_atomic_op_i32 gen; in do_atomic_op_i32() local 1185 tcg_debug_assert(gen != NULL); in do_atomic_op_i32() 1208 gen(t2, t1, t2); in do_nonatomic_op_i64() [all …]
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| /qemu/target/rx/ |
| A D | meson.build | 1 gen = [ variable 6 rx_ss.add(gen)
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| /qemu/target/microblaze/ |
| A D | meson.build | 1 gen = decodetree.process('insns.decode') variable 4 microblaze_ss.add(gen)
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| /qemu/target/avr/ |
| A D | meson.build | 1 gen = [ variable 9 avr_ss.add(gen)
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| /qemu/target/hppa/ |
| A D | meson.build | 1 gen = decodetree.process('insns.decode') variable 4 hppa_ss.add(gen)
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| /qemu/target/openrisc/ |
| A D | meson.build | 1 gen = decodetree.process('insns.decode') variable 4 openrisc_ss.add(gen)
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| /qemu/target/loongarch/ |
| A D | meson.build | 1 gen = decodetree.process('insns.decode') variable 17 common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
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| /qemu/hw/pci-host/ |
| A D | pnv_phb3_msi.c | 65 static void phb3_msi_set_p(Phb3MsiState *msi, int srcno, uint8_t gen) in phb3_msi_set_p() argument 68 uint8_t p = 0x01 | (gen << 1); in phb3_msi_set_p() 103 uint64_t server, prio, pq, gen; in phb3_msi_try_send() local 116 gen = GETFIELD(IODA2_IVT_GEN, ive); in phb3_msi_try_send() 131 phb3_msi_set_p(msi, srcno, gen); in phb3_msi_try_send()
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| /qemu/target/sparc/ |
| A D | meson.build | 1 gen = decodetree.process('insns.decode') variable 4 sparc_ss.add(gen)
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| /qemu/target/mips/tcg/ |
| A D | meson.build | 1 gen = [ variable 12 mips_ss.add(gen)
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| /qemu/target/riscv/ |
| A D | meson.build | 2 gen = [ variable 10 riscv_ss.add(gen)
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| /qemu/qga/vss-win32/ |
| A D | meson.build | 27 gen_tlb = custom_target('gen-tlb', 32 gen_tlb = custom_target('gen-tlb',
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| /qemu/linux-user/ |
| A D | meson.build | 33 gen_vdso_exe = executable('gen-vdso', 'gen-vdso.c',
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| /qemu/target/ppc/ |
| A D | meson.build | 24 gen = [ variable 31 ppc_ss.add(when: 'CONFIG_TCG', if_true: gen)
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