Home
last modified time | relevance | path

Searched refs:latch (Results 1 – 10 of 10) sorted by relevance

/qemu/hw/misc/
A Dmos6522.c209 next_time = d + ti->latch + 1; in get_next_irq_time()
211 next_time = d + ti->latch + 2; in get_next_irq_time()
349 val = s->timers[0].latch & 0xff; in mos6522_read()
433 s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; in mos6522_write()
438 s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); in mos6522_write()
443 s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; in mos6522_write()
448 s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); in mos6522_write()
454 s->timers[1].latch = (s->timers[1].latch & 0xff00) | val; in mos6522_write()
460 s->timers[1].latch = (s->timers[1].latch & 0xff) | (val << 8); in mos6522_write()
661 s->timers[0].latch = 0xffff; in mos6522_reset_hold()
[all …]
A Dtrace-events128 mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRIx64 " …
/qemu/hw/xen/
A Dxen_pt_msi.c29 #define latch(fld) latch[PCI_MSIX_ENTRY_##fld / sizeof(uint32_t)] macro
349 entry->addr = entry->latch(LOWER_ADDR) | in xen_pt_msix_update_one()
350 ((uint64_t)entry->latch(UPPER_ADDR) << 32); in xen_pt_msix_update_one()
351 entry->data = entry->latch(DATA); in xen_pt_msix_update_one()
380 xen_pt_msix_update_one(s, i, msix->msix_entry[i].latch(VECTOR_CTRL)); in xen_pt_msix_update()
429 assert(!(offset % sizeof(*e->latch))); in get_entry_value()
430 return e->latch[offset / sizeof(*e->latch)]; in get_entry_value()
435 assert(!(offset % sizeof(*e->latch))); in set_entry_value()
436 e->latch[offset / sizeof(*e->latch)] = val; in set_entry_value()
A Dxen_pt.h216 uint32_t latch[4]; member
/qemu/hw/block/
A Dswim.c284 uint8_t latch, reg, ism_bit; in iwmctrl_write() local
289 latch = (addr >> 1) & 7; in iwmctrl_write()
291 swimctrl->iwm_latches |= (1 << latch); in iwmctrl_write()
293 swimctrl->iwm_latches &= ~(1 << latch); in iwmctrl_write()
348 uint8_t latch, reg, value; in iwmctrl_read() local
353 latch = (addr >> 1) & 7; in iwmctrl_read()
355 swimctrl->iwm_latches |= (1 << latch); in iwmctrl_read()
357 swimctrl->iwm_latches &= ~(1 << latch); in iwmctrl_read()
/qemu/include/hw/misc/
A Dmos6522.h106 uint16_t latch; member
/qemu/hw/display/
A Dvga.c852 s->latch = ((uint32_t *)s->vram_ptr)[addr]; in vga_mem_readb()
855 ret = GET_PLANE(s->latch, plane); in vga_mem_readb()
858 ret = (s->latch ^ mask16[s->gr[VGA_GFX_COMPARE_VALUE]]) & in vga_mem_readb()
974 val = s->latch; in vga_mem_writeb()
999 val &= s->latch; in vga_mem_writeb()
1003 val |= s->latch; in vga_mem_writeb()
1007 val ^= s->latch; in vga_mem_writeb()
1014 val = (val & bit_mask) | (s->latch & ~bit_mask); in vga_mem_writeb()
2139 VMSTATE_UINT32(latch, VGACommonState),
A Dvga_int.h76 uint32_t latch; member
A Dcirrus_vga.c2743 VMSTATE_UINT32(vga.latch, CirrusVGAState),
/qemu/hw/arm/
A Domap1.c1903 uint16_t latch; member
1931 s->latch = s->inputs; in omap_mpuio_set()
2001 return s->latch; in omap_mpuio_read()
2100 s->latch = 0; in omap_mpuio_reset()

Completed in 50 milliseconds