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Searched refs:mask (Results 1 – 25 of 530) sorted by relevance

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/qemu/include/qemu/
A Dbitops.h72 *p |= mask; in set_bit()
98 *p &= ~mask; in clear_bit()
124 *p ^= mask; in change_bit()
138 *p = old | mask; in test_and_set_bit()
168 *p = old ^ mask; in test_and_change_bit()
275 *p |= mask; in set_bit32()
301 *p &= ~mask; in clear_bit32()
327 *p ^= mask; in change_bit32()
648 uint32_t mask; in deposit32() local
651 return (value & ~mask) | ((fieldval << start) & mask); in deposit32()
[all …]
/qemu/tests/tcg/i386/
A Dtest-i386-bmi2.c78 result = andnq(mask, ehlo); in insn1q()
81 result = pextq(ehlo, mask); in insn1q()
91 assert(result == mask); in insn1q()
120 result = bzhiq(mask, 0x3f); in insn1q()
123 result = bzhiq(mask, 0x1f); in insn1q()
126 result = bzhiq(mask, 0x40); in insn1q()
127 assert(result == mask); in insn1q()
149 result = andnl(mask, ehlo); in insn1q()
158 result = pextl(-1u, mask); in insn1q()
161 result = pdepl(-1u, mask); in insn1q()
[all …]
/qemu/include/hw/pci/
A Dpci.h546 return val & mask; in pci_byte_test_and_clear_mask()
554 return val & mask; in pci_byte_test_and_set_mask()
562 return val & mask; in pci_word_test_and_clear_mask()
612 assert(mask); in pci_set_byte_by_mask()
614 pci_set_byte(config, (~mask & val) | (mask & rval)); in pci_set_byte_by_mask()
623 assert(mask); in pci_set_word_by_mask()
625 pci_set_word(config, (~mask & val) | (mask & rval)); in pci_set_word_by_mask()
634 assert(mask); in pci_set_long_by_mask()
636 pci_set_long(config, (~mask & val) | (mask & rval)); in pci_set_long_by_mask()
645 assert(mask); in pci_set_quad_by_mask()
[all …]
/qemu/hw/net/rocker/
A Drocker-hmp-cmds.c85 RockerOfDpaFlowMask *mask = flow->mask; in hmp_rocker_of_dpa_flows() local
98 if (mask->has_in_pport) { in hmp_rocker_of_dpa_flows()
106 if (mask->has_vlan_id) { in hmp_rocker_of_dpa_flows()
113 if (mask->has_tunnel_id) { in hmp_rocker_of_dpa_flows()
143 mask->eth_src && in hmp_rocker_of_dpa_flows()
147 mask->eth_src && in hmp_rocker_of_dpa_flows()
152 if (mask->eth_src) { in hmp_rocker_of_dpa_flows()
160 mask->eth_dst && in hmp_rocker_of_dpa_flows()
164 mask->eth_dst && in hmp_rocker_of_dpa_flows()
169 if (mask->eth_dst) { in hmp_rocker_of_dpa_flows()
[all …]
A Drocker_of_dpa.c222 if (mask && mask->in_pport != 0xffffffff) { in of_dpa_flow_key_dump()
236 if (mask && mask->eth.vlan_id != 0xffff) { in of_dpa_flow_key_dump()
267 if (mask && mask->eth.type != 0xffff) { in of_dpa_flow_key_dump()
281 if (mask && mask->ip.tos != 0xff) { in of_dpa_flow_key_dump()
1065 OfDpaFlowKey *mask = &flow->mask; in of_dpa_cmd_add_ig_port() local
1102 OfDpaFlowKey *mask = &flow->mask; in of_dpa_cmd_add_vlan() local
1166 OfDpaFlowKey *mask = &flow->mask; in of_dpa_cmd_add_term_mac() local
1262 OfDpaFlowKey *mask = &flow->mask; in of_dpa_cmd_add_bridging() local
1424 OfDpaFlowKey *mask = &flow->mask; in of_dpa_cmd_add_unicast_routing() local
1516 OfDpaFlowKey *mask = &flow->mask; in of_dpa_cmd_add_multicast_routing() local
[all …]
/qemu/target/arm/tcg/
A Dmve_helper.c82 mask |= 0xff; in mve_element_mask()
85 mask |= 0xff00; in mve_element_mask()
99 mask &= ltpmask; in mve_element_mask()
106 mask &= mve_eci_mask(env); in mve_element_mask()
107 return mask; in mve_element_mask()
718 if (mask & 1) {
1102 if (mask & 0x1111) { in DO_2OP_S()
1110 if (mask & 1) { in DO_2OP_S()
2383 if (mask & 1) {
2729 newmask &= mask; in HELPER()
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/qemu/target/mips/tcg/sysemu/
A Dcp0_helper.c526 newval = (env->mvp->CP0_MVPControl & ~mask) | (arg1 & mask); in helper_mtc0_mvpcontrol()
535 uint32_t mask; in helper_mtc0_vpecontrol() local
540 newval = (env->CP0_VPEControl & ~mask) | (arg1 & mask); in helper_mtc0_vpecontrol()
556 uint32_t mask; in helper_mttc0_vpecontrol() local
561 newval = (other->CP0_VPEControl & ~mask) | (arg1 & mask); in helper_mttc0_vpecontrol()
595 newval = (env->CP0_VPEConf0 & ~mask) | (arg1 & mask); in helper_mtc0_vpeconf0()
610 newval = (other->CP0_VPEConf0 & ~mask) | (arg1 & mask); in helper_mttc0_vpeconf0()
624 newval = (env->CP0_VPEConf1 & ~mask) | (arg1 & mask); in helper_mtc0_vpeconf1()
697 newval = (env->active_tc.CP0_TCBind & ~mask) | (arg1 & mask); in helper_mtc0_tcbind()
1102 val = (arg1 & mask) | (old & ~mask); in helper_mtc0_entryhi()
[all …]
/qemu/target/mips/sysemu/
A Dcp0.c32 uint32_t mask = ((1 << CP0TCSt_TCU3) in sync_c0_status() local
56 *tcst &= ~mask; in sync_c0_status()
63 uint32_t mask = env->CP0_Status_rw_bitmask; in cpu_mips_store_status() local
67 bool has_supervisor = extract32(mask, CP0St_KSU, 2) == 0x3; in cpu_mips_store_status()
75 mask &= ~(3 << CP0St_KSU); in cpu_mips_store_status()
77 mask &= ~(((1 << CP0St_SR) | (1 << CP0St_NMI)) & val); in cpu_mips_store_status()
80 env->CP0_Status = (old & ~mask) | (val & mask); in cpu_mips_store_status()
96 uint32_t mask = 0x00C00300; in cpu_mips_store_cause() local
101 mask |= 1 << CP0Ca_DC; in cpu_mips_store_cause()
104 mask &= ~((1 << CP0Ca_WP) & val); in cpu_mips_store_cause()
[all …]
/qemu/target/s390x/tcg/
A Dcc_helper.c92 uint32_t r = val & mask; in cc_calc_tm_32()
96 } else if (r == mask) { in cc_calc_tm_32()
105 uint64_t r = val & mask; in cc_calc_tm_64()
109 } else if (r == mask) { in cc_calc_tm_64()
112 int top = clz64(mask); in cc_calc_tm_64()
259 if ((val & mask) == 0) { in cc_calc_icm()
262 int top = clz64(mask); in cc_calc_icm()
280 match = mask; in cc_calc_sla()
284 if ((src & mask) != match) { in cc_calc_sla()
482 s390_cpu_set_psw(env, mask, addr); in HELPER()
[all …]
A Dexcp_helper.c201 uint64_t mask, addr; in do_program_interrupt() local
281 mask = be64_to_cpu(lowcore->program_new_psw.mask); in do_program_interrupt()
287 s390_cpu_set_psw(env, mask, addr); in do_program_interrupt()
292 uint64_t mask, addr; in do_svc_interrupt() local
301 mask = be64_to_cpu(lowcore->svc_new_psw.mask); in do_svc_interrupt()
323 uint64_t mask, addr; in do_ext_interrupt() local
373 mask = be64_to_cpu(lowcore->external_new_psw.mask); in do_ext_interrupt()
386 uint64_t mask, addr; in do_io_interrupt() local
402 mask = be64_to_cpu(lowcore->io_new_psw.mask); in do_io_interrupt()
445 uint64_t mask, addr, mcesao = 0; in do_mchk_interrupt() local
[all …]
A Dvec_string_helper.c26 return ~(((a & mask) + mask) | a | mask); in zero_search()
35 return (((a & mask) + mask) | a) & ~mask; in nonzero_search()
105 e0 = ~e0 & ~mask; in vfae()
106 e1 = ~e1 & ~mask; in vfae()
111 z0 = zero_search(a0, mask); in vfae()
112 z1 = zero_search(a1, mask); in vfae()
180 z0 = zero_search(a0, mask); in vfee()
181 z1 = zero_search(a1, mask); in vfee()
247 z0 = zero_search(a0, mask); in vfene()
294 z = zero_search(a0, mask); in vistr()
[all …]
/qemu/util/
A Dcompatfd.c24 sigset_t mask; member
36 err = sigwait(&info->mask, &sig); in sigwait_compat()
55 static int qemu_signalfd_compat(const sigset_t *mask) in qemu_signalfd_compat() argument
68 memcpy(&info->mask, mask, sizeof(*mask)); in qemu_signalfd_compat()
77 int qemu_signalfd(const sigset_t *mask) in qemu_signalfd() argument
82 ret = signalfd(-1, mask, SFD_CLOEXEC); in qemu_signalfd()
88 return qemu_signalfd_compat(mask); in qemu_signalfd()
/qemu/target/alpha/
A Dint_helper.c29 uint64_t mask; in helper_zapnot() local
31 mask = -(mskb & 0x01) & 0x00000000000000ffull; in helper_zapnot()
32 mask |= -(mskb & 0x02) & 0x000000000000ff00ull; in helper_zapnot()
40 return val & mask; in helper_zapnot()
43 uint64_t helper_zap(uint64_t val, uint64_t mask) in helper_zap() argument
45 return helper_zapnot(val, ~mask); in helper_zap()
64 uint64_t mask = 0x00ff00ff00ff00ffULL; in helper_cmpbge() local
69 al = a & mask; in helper_cmpbge()
70 bl = b & mask; in helper_cmpbge()
71 ah = (a >> 8) & mask; in helper_cmpbge()
[all …]
/qemu/hw/intc/
A Di8259.c67 if (mask == 0) { in get_priority()
82 mask = s->irr & ~s->imr; in pic_get_irq()
90 mask = s->isr; in pic_get_irq()
92 mask &= ~s->imr; in pic_get_irq()
95 mask &= ~(1 << 2); in pic_get_irq()
124 int mask = 1 << irq; in pic_set_irq() local
139 s->irr |= mask; in pic_set_irq()
140 s->last_irr |= mask; in pic_set_irq()
142 s->irr &= ~mask; in pic_set_irq()
149 s->irr |= mask; in pic_set_irq()
[all …]
A Dloongarch_pch_pic.c49 uint64_t mask = 1ULL << irq; in pch_pic_irq_handler() local
54 if (s->intedge & mask) { in pch_pic_irq_handler()
59 s->intirr |= mask; in pch_pic_irq_handler()
61 s->last_intirr |= mask; in pch_pic_irq_handler()
63 s->last_intirr &= ~mask; in pch_pic_irq_handler()
68 s->intirr |= mask; in pch_pic_irq_handler()
69 s->last_intirr |= mask; in pch_pic_irq_handler()
71 s->intirr &= ~mask; in pch_pic_irq_handler()
72 s->last_intirr &= ~mask; in pch_pic_irq_handler()
75 pch_pic_update_irq(s, mask, level); in pch_pic_irq_handler()
[all …]
/qemu/crypto/
A Dclmul.c16 uint64_t mask = (n & 0x0101010101010101ull) * 0xff; in clmul_8x8_low() local
17 r ^= m & mask; in clmul_8x8_low()
29 uint64_t mask = (n & 0x0001000100010001ull) * 0xffff; in clmul_8x4_even_int() local
30 r ^= m & mask; in clmul_8x4_even_int()
70 uint64_t mask = (n & 0x0000000100000001ull) * 0xffffffffull; in clmul_16x2_even() local
71 r ^= m & mask; in clmul_16x2_even()
106 uint64_t mask = -((n >> i) & 1); in clmul_64_gen() local
107 rl ^= (m << i) & mask; in clmul_64_gen()
108 rh ^= (m >> (64 - i)) & mask; in clmul_64_gen()
/qemu/include/hw/ppc/
A Dxive_regs.h185 static inline uint64_t xive_get_field64(uint64_t mask, uint64_t word) in xive_get_field64() argument
187 return (be64_to_cpu(word) & mask) >> ctz64(mask); in xive_get_field64()
190 static inline uint64_t xive_set_field64(uint64_t mask, uint64_t word, in xive_set_field64() argument
194 (be64_to_cpu(word) & ~mask) | ((value << ctz64(mask)) & mask); in xive_set_field64()
198 static inline uint32_t xive_get_field32(uint32_t mask, uint32_t word) in xive_get_field32() argument
200 return (be32_to_cpu(word) & mask) >> ctz32(mask); in xive_get_field32()
203 static inline uint32_t xive_set_field32(uint32_t mask, uint32_t word, in xive_set_field32() argument
207 (be32_to_cpu(word) & ~mask) | ((value << ctz32(mask)) & mask); in xive_set_field32()
/qemu/hw/gpio/
A Dpl061.c160 uint8_t mask; in pl061_update() local
180 mask = 1 << i; in pl061_update()
194 mask = 1 << i; in pl061_update()
340 uint8_t mask; in pl061_write() local
347 s->data = (s->data & ~mask) | (value & mask); in pl061_write()
369 mask = s->cr; in pl061_write()
370 s->afsel = (s->afsel & ~mask) | (value & mask); in pl061_write()
508 uint8_t mask; in pl061_set_irq() local
510 mask = 1 << irq; in pl061_set_irq()
512 s->data &= ~mask; in pl061_set_irq()
[all …]
A Dmpc8xxx.c101 uint32_t mask = 0x80000000 >> i; in mpc8xxx_write_data() local
102 if (!(diff & mask)) { in mpc8xxx_write_data()
106 if (s->dir & mask) { in mpc8xxx_write_data()
108 qemu_set_irq(s->out[i], (new_data & mask) != 0); in mpc8xxx_write_data()
164 uint32_t mask; in mpc8xxx_gpio_set_irq() local
166 mask = 0x80000000 >> irq; in mpc8xxx_gpio_set_irq()
167 if ((s->dir & mask) == 0) { in mpc8xxx_gpio_set_irq()
168 uint32_t old_value = s->dat & mask; in mpc8xxx_gpio_set_irq()
170 s->dat &= ~mask; in mpc8xxx_gpio_set_irq()
172 s->dat |= mask; in mpc8xxx_gpio_set_irq()
[all …]
/qemu/target/s390x/
A Dcpu.c50 if (mask & PSW_MASK_RESERVED) { in is_early_exception_psw()
54 switch (mask & (PSW_MASK_32 | PSW_MASK_64)) { in is_early_exception_psw()
70 uint64_t old_mask = env->psw.mask; in s390_cpu_set_psw()
74 env->psw.mask = mask; in s390_cpu_set_psw()
80 env->cc_op = (mask >> 44) & 3; in s390_cpu_set_psw()
83 if (is_early_exception_psw(mask, addr)) { in s390_cpu_set_psw()
89 if ((old_mask ^ mask) & PSW_MASK_PER) { in s390_cpu_set_psw()
93 if (mask & PSW_MASK_WAIT) { in s390_cpu_set_psw()
101 uint64_t r = env->psw.mask; in s390_cpu_get_psw_mask()
211 env->psw.mask &= ~PSW_MASK_RI; in s390_cpu_reset_hold()
[all …]
/qemu/tests/qtest/libqos/
A Dahci.h496 #define BITANY(data, mask) (((data) & (mask)) != 0) argument
497 #define BITSET(data, mask) (((data) & (mask)) == (mask)) argument
498 #define BITCLR(data, mask) (((data) & (mask)) == 0) argument
499 #define ASSERT_BIT_SET(data, mask) g_assert_cmphex((data) & (mask), ==, (mask)) argument
500 #define ASSERT_BIT_CLEAR(data, mask) g_assert_cmphex((data) & (mask), ==, 0) argument
529 ahci_wreg(ahci, reg_num, ahci_rreg(ahci, reg_num) | mask); in ahci_set()
534 ahci_wreg(ahci, reg_num, ahci_rreg(ahci, reg_num) & ~mask); in ahci_clr()
555 uint32_t reg_num, uint32_t mask) in ahci_px_set() argument
558 ahci_px_rreg(ahci, port, reg_num) | mask); in ahci_px_set()
562 uint32_t reg_num, uint32_t mask) in ahci_px_clr() argument
[all …]
/qemu/target/xtensa/
A Ddbg_helper.c89 uint32_t mask = dbreakc | ~DBREAKC_MASK; in set_dbreak() local
101 if ((~mask + 1) & ~mask) { in set_dbreak()
105 mask = 0xffffffff << (32 - clo32(mask)); in set_dbreak()
107 if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1, in set_dbreak()
112 dbreaka & mask, ~mask + 1); in set_dbreak()
/qemu/linux-user/s390x/
A Dsignal.c134 __put_user(psw_mask, &sregs->regs.psw.mask); in save_sigregs()
223 | (env->psw.mask & ~PSW_MASK_ASC); in setup_frame()
289 | (env->psw.mask & ~PSW_MASK_ASC); in setup_rt_frame()
300 uint64_t prev_addr, prev_mask, mask, addr; in restore_sigregs() local
308 __get_user(mask, &sc->regs.psw.mask); in restore_sigregs()
320 mask = (prev_mask & ~PSW_MASK_USER) | (mask & PSW_MASK_USER); in restore_sigregs()
322 if ((mask & PSW_MASK_ASC) == PSW_ASC_HOME) { in restore_sigregs()
323 mask = (mask & ~PSW_MASK_ASC) | PSW_ASC_PRIMARY; in restore_sigregs()
326 if (mask & PSW_MASK_64) { in restore_sigregs()
327 mask |= PSW_MASK_32; in restore_sigregs()
[all …]
/qemu/hw/misc/
A Dimx_rngc.c74 val |= s->mask; in imx_rngc_read()
134 s->mask = 0; in imx_rngc_do_reset()
175 s->mask |= RNGC_CTRL_BIT_MASK_ERR; in imx_rngc_write()
177 s->mask &= ~RNGC_CTRL_BIT_MASK_ERR; in imx_rngc_write()
181 s->mask |= RNGC_CTRL_BIT_MASK_DONE; in imx_rngc_write()
183 s->mask &= ~RNGC_CTRL_BIT_MASK_DONE; in imx_rngc_write()
206 if (!(s->mask & RNGC_CTRL_BIT_MASK_DONE)) { in imx_rngc_self_test()
216 if (!(s->mask & RNGC_CTRL_BIT_MASK_DONE)) { in imx_rngc_seed()
251 VMSTATE_UINT8(mask, IMXRNGCState),
/qemu/ui/
A Dcursor.c133 int transparent, uint8_t *mask) in cursor_set_mono() argument
138 bool expand_bitmap_only = image == mask; in cursor_set_mono()
150 if (transparent && mask[x/8] & bit) { in cursor_set_mono()
157 } else if (!transparent && !(mask[x/8] & bit)) { in cursor_set_mono()
169 mask += bpl; in cursor_set_mono()
200 void cursor_get_mono_mask(QEMUCursor *c, int transparent, uint8_t *mask) in cursor_get_mono_mask() argument
207 memset(mask, 0, bpl * c->height); in cursor_get_mono_mask()
213 mask[x/8] |= bit; in cursor_get_mono_mask()
217 mask[x/8] |= bit; in cursor_get_mono_mask()
225 mask += bpl; in cursor_get_mono_mask()

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