| /qemu/hw/core/ |
| A D | sysbus-fdt.c | 222 uint64_t mmio_base, irq_number; in add_calxeda_midway_xgmac_fdt_node() local
226 mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, 0); in add_calxeda_midway_xgmac_fdt_node()
228 vbasedev->name, mmio_base); in add_calxeda_midway_xgmac_fdt_node()
240 reg_attr[2 * i] = cpu_to_be32(mmio_base); in add_calxeda_midway_xgmac_fdt_node()
304 uint64_t mmio_base, irq_number; in add_amd_xgbe_fdt_node() local
361 mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, 0); in add_amd_xgbe_fdt_node()
363 vbasedev->name, mmio_base); in add_amd_xgbe_fdt_node()
378 reg_attr[2 * i] = cpu_to_be32(mmio_base); in add_amd_xgbe_fdt_node()
457 uint64_t mmio_base; in add_tpm_tis_fdt_node() local
459 mmio_base = platform_bus_get_mmio_addr(pbus, sbdev, 0); in add_tpm_tis_fdt_node()
[all …]
|
| /qemu/hw/pci-host/ |
| A D | astro.c | 114 val = s->mmio_base[index]; in elroy_chip_read_with_attrs()
180 put_val_in_arrary(s->mmio_base, 0x200, addr, size, val); in elroy_chip_write_with_attrs()
827 elroy->mmio_base[(0x0200 - 0x200) / 8] = 0xf0000001; in astro_realize()
828 elroy->mmio_base[(0x0208 - 0x200) / 8] = 0xf8000000; in astro_realize()
830 elroy->mmio_base[(0x0210 - 0x200) / 8] = 0x000000f800000001; in astro_realize()
831 elroy->mmio_base[(0x0218 - 0x200) / 8] = 0x000000ff80000000; in astro_realize()
833 elroy->mmio_base[(0x0220 - 0x200) / 8] = 0xf0000001; in astro_realize()
834 elroy->mmio_base[(0x0228 - 0x200) / 8] = 0xf0000000; in astro_realize()
836 elroy->mmio_base[(0x0230 - 0x200) / 8] = 0x000000f800000001; in astro_realize()
837 elroy->mmio_base[(0x0238 - 0x200) / 8] = 0x000000fc00000000; in astro_realize()
[all …]
|
| A D | xilinx-pcie.c | 163 DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
279 pci_set_word(pci_dev->config + PCI_MEMORY_BASE, s->mmio_base >> 16); in xilinx_pcie_root_realize()
281 ((s->mmio_base + s->mmio_size - 1) >> 16) & 0xfff0); in xilinx_pcie_root_realize()
|
| /qemu/hw/openrisc/ |
| A D | virt.c | 370 hwaddr mmio_base, hwaddr mmio_size, in openrisc_virt_pcie_init() argument
401 reg, mmio_base, mmio_size); in openrisc_virt_pcie_init()
402 memory_region_add_subregion(get_system_memory(), mmio_base, alias); in openrisc_virt_pcie_init()
436 FDT_PCI_RANGE_MMIO, 0, mmio_base, in openrisc_virt_pcie_init()
437 mmio_base, 0, mmio_size); in openrisc_virt_pcie_init()
|
| /qemu/include/hw/block/ |
| A D | fdc.h | 13 void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds);
|
| /qemu/hw/block/ |
| A D | fdc-sysbus.c | 99 void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds) in fdctrl_init_sysbus() argument
110 sysbus_mmio_map(sbd, 0, mmio_base); in fdctrl_init_sysbus()
|
| /qemu/include/hw/pci-host/ |
| A D | xilinx-pcie.h | 50 uint64_t mmio_base, mmio_size; member
|
| A D | astro.h | 51 uint64_t mmio_base[(0x0250 - 0x200) / 8]; member
|
| /qemu/hw/mips/ |
| A D | boston.c | 430 hwaddr mmio_base, uint64_t mmio_size, in xilinx_pcie_init() argument
441 qdev_prop_set_uint64(dev, "mmio_base", mmio_base); in xilinx_pcie_init()
459 hwaddr reg_size, hwaddr mmio_base, hwaddr mmio_size) in fdt_create_pcie() argument
482 qemu_fdt_setprop_cells(fdt, name, "ranges", 0x02000000, 0, mmio_base, in fdt_create_pcie()
483 mmio_base, 0, mmio_size); in fdt_create_pcie()
|
| /qemu/hw/riscv/ |
| A D | virt-acpi-build.c | 145 uint64_t mmio_base, uint64_t mmio_size, in acpi_dsdt_add_plic_aplic() argument
153 plic_aplic_addr = mmio_base + mmio_size * socket; in acpi_dsdt_add_plic_aplic()
|
| A D | virt.c | 1131 hwaddr mmio_base = s->memmap[VIRT_PCIE_MMIO].base; in gpex_pcie_init() local
1149 mmio_base, NULL); in gpex_pcie_init()
1173 mmio_reg, mmio_base, mmio_size); in gpex_pcie_init()
1174 memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias); in gpex_pcie_init()
|