Home
last modified time | relevance | path

Searched refs:msix_enabled (Results 1 – 25 of 26) sorted by relevance

12

/qemu/include/standard-headers/linux/
A Dvirtio_pci.h80 #define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20) argument
82 #define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled)
/qemu/hw/usb/
A Dhcd-xhci-pci.c43 if (!msix_enabled(pci_dev)) { in xhci_pci_intr_update()
66 !(msix_enabled(pci_dev) || in xhci_pci_intr_raise()
71 if (msix_enabled(pci_dev) && level) { in xhci_pci_intr_raise()
/qemu/tests/qtest/libqos/
A Dvirtio-pci.c40 #define CONFIG_BASE(dev) (VIRTIO_PCI_CONFIG_OFF((dev)->pdev->msix_enabled))
128 if (dev->pdev->msix_enabled) { in qvirtio_pci_get_queue_isr_status()
152 if (dev->pdev->msix_enabled) { in qvirtio_pci_get_config_isr_status()
320 g_assert(d->pdev->msix_enabled); in qvirtqueue_pci_msix_setup()
351 g_assert(d->pdev->msix_enabled); in qvirtio_pci_set_msix_configuration_vector()
A Dpci.c298 dev->msix_enabled = true; in qpci_msix_enable()
306 g_assert(dev->msix_enabled); in qpci_msix_disable()
318 dev->msix_enabled = 0; in qpci_msix_disable()
329 g_assert(dev->msix_enabled); in qpci_msix_pending()
342 g_assert(dev->msix_enabled); in qpci_msix_masked()
A Dvirtio-pci-modern.c152 if (dev->pdev->msix_enabled) { in get_queue_isr_status()
166 if (dev->pdev->msix_enabled) { in get_config_isr_status()
A Dpci.h68 bool msix_enabled; member
/qemu/hw/pci/
A Dpci-stub.c79 int msix_enabled(PCIDevice *dev) in msix_enabled() function
A Dmsix.c175 dev->msix_function_masked = !msix_enabled(dev) || msix_masked(dev); in msix_update_function_masked()
190 trace_msix_write_config(dev->name, msix_enabled(dev), msix_masked(dev)); in msix_write_config()
195 if (!msix_enabled(dev)) { in msix_write_config()
517 int msix_enabled(PCIDevice *dev) in msix_enabled() function
A Dpcie_aer.c294 if (msix_enabled(dev)) { in pcie_aer_root_notify()
781 if (!msix_enabled(dev) && !msi_enabled(dev)) { in pcie_aer_root_write_config()
A Dpcie_doe.c175 if (msix_enabled(dev)) { in pcie_doe_irq_assert()
A Dpcie.c423 if (msix_enabled(dev)) { in hotplug_event_notify()
435 if (!msix_enabled(dev) && !msi_enabled(dev) && pci_intx(dev) != -1 && in hotplug_event_clear()
A Dpci.c2900 if (msix_enabled(dev)) { in pci_get_msi_message()
/qemu/include/hw/pci/
A Dmsix.h29 int msix_enabled(PCIDevice *dev);
/qemu/hw/misc/
A Divshmem.c267 if (msix_enabled(pdev)) { in ivshmem_vector_notify()
458 } else if (msix_enabled(pdev)) { in setup_interrupt()
819 int is_enabled, was_enabled = msix_enabled(pdev); in ivshmem_write_config()
822 is_enabled = msix_enabled(pdev); in ivshmem_write_config()
/qemu/hw/riscv/
A Driscv-iommu-pci.c74 if (msix_enabled(&(s->pci))) { in riscv_iommu_pci_notify()
/qemu/hw/ppc/
A Dspapr_pci_vfio.c251 if (msix_enabled(pdev)) { in spapr_phb_vfio_eeh_clear_dev_msix()
/qemu/hw/net/
A De1000e_core.c262 if (msix_enabled(core->owner)) { in e1000e_intrmgr_delay_rx_causes()
316 if (msix_enabled(core->owner)) { in e1000e_intrmgr_delay_tx_causes()
344 if (msix_enabled(core->owner)) { in e1000e_intmgr_collect_delayed_causes()
747 if (!msix_enabled(core->owner)) { in e1000e_tx_wb_interrupt_cause()
758 if (!msix_enabled(core->owner)) { in e1000e_rx_wb_interrupt_cause()
2100 bool is_msix = msix_enabled(core->owner); in e1000e_raise_interrupts()
2171 !msix_enabled(core->owner) && !msi_enabled(core->owner)) { in e1000e_lower_interrupts()
2348 if (!msix_enabled(core->owner)) { in e1000e_set_pbaclr()
2489 msix_enabled(core->owner)) { in e1000e_set_ims()
2578 if (!msix_enabled(core->owner)) { in e1000e_mac_icr_read()
A Dvmxnet3.c251 if (s->msix_used && msix_enabled(d)) { in _vmxnet3_assert_interrupt_line()
275 assert(!s->msix_used || !msix_enabled(d)); in _vmxnet3_deassert_interrupt_line()
313 if (s->msix_used && msix_enabled(d) && s->auto_int_masking) { in vmxnet3_trigger_interrupt()
A Digb_core.c2332 if (msix_enabled(core->owner)) { in igb_raise_interrupts()
2358 if (!msix_enabled(core->owner) && !msi_enabled(core->owner)) { in igb_lower_interrupts()
2755 if (!msix_enabled(core->owner)) { in igb_set_pbaclr()
2909 } else if (!msix_enabled(core->owner)) { in igb_mac_icr_read()
/qemu/hw/cxl/
A Dcxl-events.c256 if (msix_enabled(pdev)) { in cxl_event_irq_assert()
A Dcxl-mailbox-utils.c2947 if (msix_enabled(pdev)) { in bg_timercb()
/qemu/hw/virtio/
A Dvirtio-pci.c50 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
75 if (msix_enabled(&proxy->pci_dev)) { in virtio_pci_notify()
1206 if (!msix_enabled(&proxy->pci_dev) && in virtio_pci_set_guest_notifier()
1218 return msix_enabled(&proxy->pci_dev); in virtio_pci_query_guest_notifiers()
1227 bool with_irqfd = msix_enabled(&proxy->pci_dev) && in virtio_pci_set_guest_notifiers()
1432 msix_enabled(&proxy->pci_dev) && kvm_msi_via_irqfd_enabled(); in virtio_pci_set_vector()
/qemu/hw/scsi/
A Dmegasas.c579 if (msix_enabled(pci_dev)) { in megasas_complete_frame()
2109 !msix_enabled(pci_dev)) { in megasas_mmio_write()
2114 if (msix_enabled(pci_dev)) { in megasas_mmio_write()
2130 if (!msix_enabled(pci_dev) && !msi_enabled(pci_dev)) { in megasas_mmio_write()
/qemu/hw/vfio/
A Dpci.c1284 int is_enabled, was_enabled = msix_enabled(pdev); in vfio_pci_write_config()
1288 is_enabled = msix_enabled(pdev); in vfio_pci_write_config()
2650 } else if (msix_enabled(pdev)) { in vfio_pci_load_config()
/qemu/hw/nvme/
A Dctrl.c656 if (msix_enabled(pci)) { in nvme_irq_check()
677 if (msix_enabled(pci)) { in nvme_irq_assert()
694 if (msix_enabled(PCI_DEVICE(n))) { in nvme_irq_deassert()
5432 if (msix_enabled(pci) && cq->irq_enabled) { in nvme_free_cq()
5473 if (msix_enabled(pci) && irq_enabled) { in nvme_init_cq()
5535 if (unlikely(!msix_enabled(PCI_DEVICE(n)) && vector)) { in nvme_create_cq()
7725 if (unlikely(msix_enabled(pci))) { in nvme_write_bar()
7738 if (unlikely(msix_enabled(pci))) { in nvme_write_bar()

Completed in 100 milliseconds

12