Searched refs:rounding (Results 1 – 18 of 18) sorted by relevance
| /qemu/tests/fp/ |
| A D | fp-bench.c | 61 enum rounding { enum
551 void die_host_rounding(enum rounding rounding) in die_host_rounding() argument
554 round_names[rounding]); in die_host_rounding()
558 static void set_host_precision(enum rounding rounding) in set_host_precision() argument
562 switch (rounding) { in set_host_precision()
576 die_host_rounding(rounding); in set_host_precision()
583 die_host_rounding(rounding); in set_host_precision()
587 static void set_soft_precision(enum rounding rounding) in set_soft_precision() argument
591 switch (rounding) { in set_soft_precision()
617 int rounding = ROUND_EVEN; in parse_args() local
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| /qemu/include/libdecnumber/ |
| A D | decContext.h | 68 enum rounding { enum
85 enum rounding round; /* rounding mode */
241 extern enum rounding decContextGetRounding(decContext *);
245 extern decContext * decContextSetRounding(decContext *, enum rounding);
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| /qemu/libdecnumber/ |
| A D | decContext.c | 166 enum rounding decContextGetRounding(decContext *context) { in decContextGetRounding()
225 enum rounding newround) { in decContextSetRounding()
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| /qemu/target/loongarch/tcg/insn_trans/ |
| A D | trans_fmov.c.inc | 111 * Install the new rounding mode to fpu_status, if changed.
112 * Note that FCSR3 is exactly the rounding mode field.
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| /qemu/fpu/ |
| A D | softfloat-parts.c.inc | 140 * are FRAC_SHIFT bits that may require rounding at the bottom of the
468 * `b' then adding 'c', with no intermediate rounding step after the
563 /* Narrow with sticky bit, for proper rounding later. */
965 * which leaves room for sticky and rounding bit.
1056 * rounded according to the current rounding mode. If `a' is a NaN,
1086 /* TODO: N - 2 is frac_size for rounding; could use input fmt. */
1122 * rounded according to the current rounding mode. If `a' is a NaN,
1153 /* TODO: N - 2 is frac_size for rounding; could use input fmt. */
1216 /* TODO: N - 2 is frac_size for rounding; could use input fmt. */
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| /qemu/target/arm/tcg/ |
| A D | vfp-uncond.decode | 70 # VCVT float to int with specified rounding mode; Vd is always single-precision
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| A D | translate-vfp.c | 435 int rounding = fp_decode_rm[a->rm]; in trans_VRINT() local
468 tcg_rmode = gen_set_rmode(rounding, fpst); in trans_VRINT()
502 int rounding = fp_decode_rm[a->rm]; in trans_VCVT() local
536 tcg_rmode = gen_set_rmode(rounding, fpst); in trans_VCVT()
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| A D | mve.decode | 817 # VCVT from floating point to integer with specified rounding mode
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| A D | sve.decode | 1343 ### SVE2 saturating/rounding bitwise shift left (predicated)
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| /qemu/target/hexagon/imported/ |
| A D | alu.idef | 641 "Avg vector of half integers with rounding",
1026 "Average vector of words with convergent rounding",
1035 "Average negative vector of words with convergent rounding",
1044 "Average vector of halfwords with conv rounding",
1053 "Average negative vector of halfwords with conv rounding",
1090 "Average vector of unsigned halfwords with rounding",
1099 "Average vector of halfwords with rounding",
1108 "Negative Average vector of halfwords with rounding",
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| A D | macros.def | 797 fROUND, /* optional rounding */
803 fCLIP, /* optional rounding */
812 fCRND, /* optional rounding */
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| A D | mpy.idef | 636 /* With rounding */
746 /* With rounding */
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| /qemu/docs/system/arm/ |
| A D | emulation.rst | 117 - FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions)
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| /qemu/target/mips/tcg/ |
| A D | mxu_translate.c | 1043 TCGv rounding = tcg_temp_new(); in gen_mxu_d16mul() local
1047 tcg_gen_andi_tl(rounding, mxu_CR, 0x2); in gen_mxu_d16mul()
1048 tcg_gen_brcondi_tl(TCG_COND_EQ, rounding, 0, l_done); in gen_mxu_d16mul()
1170 TCGv rounding = tcg_temp_new(); in gen_mxu_d16mac() local
1172 tcg_gen_andi_tl(rounding, mxu_CR, 0x2); in gen_mxu_d16mac()
1173 tcg_gen_brcondi_tl(TCG_COND_EQ, rounding, 0, l_done); in gen_mxu_d16mac()
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| /qemu/target/ppc/ |
| A D | dfp_helper.c | 72 enum rounding rnd; in dfp_prepare_rounding_mode()
109 enum rounding rnd; in dfp_set_round_mode_from_immediate()
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| A D | int_helper.c | 1535 #define VRFI(suffix, rounding) \ argument
1542 set_float_rounding_mode(rounding, &s); \
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| /qemu/docs/devel/ |
| A D | clocks.rst | 335 next lowest integer. This implies some inaccuracy due to the rounding,
402 potential rounding errors. It will return '0' if the clock is stopped
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| /qemu/qapi/ |
| A D | block-core.json | 5385 # @force-size: Force use of the exact byte size instead of rounding to
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