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/qemu/hw/gpio/
A Daspeed_gpio.c714 set->direction = update_value_control_source(set, set->direction, in aspeed_gpio_write_index_mode()
772 set->reset_tol = update_value_control_source(set, set->reset_tol, in aspeed_gpio_write_index_mode()
897 set->reset_tol = update_value_control_source(set, set->reset_tol, in aspeed_gpio_write()
1091 set->direction = update_value_control_source(set, set->direction, in aspeed_gpio_2700_write_control_reg()
1107 set->int_enable = update_value_control_source(set, set->int_enable, in aspeed_gpio_2700_write_control_reg()
1114 set->int_sens_0 = update_value_control_source(set, set->int_sens_0, in aspeed_gpio_2700_write_control_reg()
1121 set->int_sens_1 = update_value_control_source(set, set->int_sens_1, in aspeed_gpio_2700_write_control_reg()
1128 set->int_sens_2 = update_value_control_source(set, set->int_sens_2, in aspeed_gpio_2700_write_control_reg()
1135 set->reset_tol = update_value_control_source(set, set->reset_tol, in aspeed_gpio_2700_write_control_reg()
1142 set->debounce_1 = update_value_control_source(set, set->debounce_1, in aspeed_gpio_2700_write_control_reg()
[all …]
/qemu/libdecnumber/
A DdecNumber.c870 || (dn->exponent-1>set->emax-set->digits)) { in decNumberFromString()
1294 dcmul=*set; in decNumberFMA()
1629 p=(rhs->digits+t>set->digits?rhs->digits+t:set->digits)+3; in decNumberLog10()
4092 && rhs->exponent<=set->emax-set->digits+1 /* [could clamp] */ in decAddOp()
4462 res->exponent=set->emin-set->digits+1; in decDivideOp()
6786 Int maxd=set->emax-set->digits+1-dn->exponent;
7346 if (dn->exponent+1==set->emin-set->digits+1) {
7473 shift=dn->exponent-(set->emax-set->digits+1);
7555 dn->exponent=set->emax-set->digits+1;
8099 && (set->digits<1 || set->round>=DEC_ROUND_MAX)) {
[all …]
/qemu/hw/riscv/
A Driscv-iommu.h93 unsigned idx, uint32_t set, uint32_t clr) in riscv_iommu_reg_mod32() argument
96 stl_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod32()
101 uint32_t set) in riscv_iommu_reg_set32() argument
103 stl_le_p(s->regs_rw + idx, set); in riscv_iommu_reg_set32()
112 uint64_t set, uint64_t clr) in riscv_iommu_reg_mod64() argument
115 stq_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod64()
120 uint64_t set) in riscv_iommu_reg_set64() argument
122 stq_le_p(s->regs_rw + idx, set); in riscv_iommu_reg_set64()
/qemu/linux-user/alpha/
A Dsignal.c75 __put_user(set->sig[0], &sc->sc_mask); in setup_sigcontext()
126 target_sigset_t *set, CPUAlphaState *env) in setup_frame() argument
138 setup_sigcontext(&frame->sc, env, frame_addr, set); in setup_frame()
164 target_sigset_t *set, CPUAlphaState *env) in setup_rt_frame() argument
180 __put_user(set->sig[0], &frame->uc.tuc_osf_sigmask); in setup_rt_frame()
214 sigset_t set; in do_sigreturn() local
223 target_to_host_sigset_internal(&set, &target_set); in do_sigreturn()
224 set_sigmask(&set); in do_sigreturn()
239 sigset_t set; in do_rt_sigreturn() local
245 target_to_host_sigset(&set, &frame->uc.tuc_sigmask); in do_rt_sigreturn()
[all …]
/qemu/
A D.exrc3 "set secure
4 "set exrc
5 set expandtab
6 set shiftwidth=4
7 set smarttab
A Dmeson.build2491 config_host_data.set('CONFIG_TCG', 1)
2680 config_host_data.set('CONFIG_FIEMAP',
2692 config_host_data.set('HAVE_OPTRESET',
2709 config_host_data.set('CONFIG_IOVEC',
2712 config_host_data.set('HAVE_UTMPX',
2886 # if this macro is set.
3315 config_target_data.set(k, 1)
3317 config_target_data.set(k, 0)
3319 config_target_data.set(k, v)
3322 config_target_data.set('QEMU_ARCH',
[all …]
/qemu/tests/image-fuzzer/qcow2/
A Dlayout.py340 cluster_ids = set()
358 blocks = set(init_blocks)
359 clusters = set()
423 block_clusters = set([random.choice(list(set(range(1, 4)) -
425 block_ids = set([0])
426 table_clusters = set([random.choice(list(set(range(1, 4)) -
542 free = set(range(1, append_id)) - used
544 return set(random.sample(free, number))
578 free = list(set(range(1, append_id)) - used)
590 return set(random.sample(range(1, num_of_cls + 1),
[all …]
/qemu/target/ppc/
A Dtrace-events4 kvm_failed_spr_set(int spr, const char *msg) "Warning: Unable to set SPR %d to KVM: %s"
6 kvm_failed_fpscr_set(const char *msg) "Unable to set FPSCR to KVM: %s"
7 kvm_failed_fp_set(const char *fpname, int fpnum, const char *msg) "Unable to set %s%d to KVM: %s"
8 kvm_failed_vscr_set(const char *msg) "Unable to set VSCR to KVM: %s"
9 kvm_failed_vr_set(int vr, const char *msg) "Unable to set VR%d to KVM: %s"
17 kvm_failed_vpa_addr_set(const char *msg) "Unable to set VPA address to KVM: %s"
18 kvm_failed_slb_set(const char *msg) "Unable to set SLB shadow state to KVM: %s"
19 kvm_failed_dtl_set(const char *msg) "Unable to set dispatch trace log state to KVM: %s"
20 kvm_failed_null_vpa_addr_set(const char *msg) "Unable to set VPA address to KVM: %s"
21 kvm_failed_put_vpa(void) "Warning: Unable to set VPA information to KVM"
/qemu/contrib/plugins/
A Dcache.c152 CacheSet *set = &cache->sets[set_idx]; in lru_update_blk() local
154 set->lru_gen_counter++; in lru_update_blk()
204 GQueue *q = cache->sets[set].fifo_queue; in fifo_get_first_block()
210 GQueue *q = cache->sets[set].fifo_queue; in fifo_update_on_miss()
322 return lru_get_lru_block(cache, set); in get_replaced_block()
333 uint64_t tag, set; in in_cache() local
336 set = extract_set(cache, addr); in in_cache()
359 uint64_t tag, set; in access_cache() local
362 set = extract_set(cache, addr); in access_cache()
367 update_hit(cache, set, hit_blk); in access_cache()
[all …]
/qemu/tests/tcg/multiarch/
A Dsigreturn-sigmask.c33 sigset_t set; in main() local
38 assert(sigemptyset(&set) == 0); in main()
39 assert(sigaddset(&set, SIGUSR2) == 0); in main()
40 assert(sigprocmask(SIG_BLOCK, &set, NULL) == 0); in main()
46 assert(sigwait(&set, &sig) == 0); in main()
/qemu/tests/tcg/riscv64/
A Dtest-fcvtmod.c31 int set = 0; in print_fflags() local
39 printf("%sFFLAG_NV", set ? " | " : ""); in print_fflags()
40 set = 1; in print_fflags()
43 printf("%sFFLAG_DZ", set ? " | " : ""); in print_fflags()
44 set = 1; in print_fflags()
47 printf("%sFFLAG_OF", set ? " | " : ""); in print_fflags()
48 set = 1; in print_fflags()
51 printf("%sFFLAG_UF", set ? " | " : ""); in print_fflags()
52 set = 1; in print_fflags()
55 printf("%sFFLAG_NX", set ? " | " : ""); in print_fflags()
[all …]
/qemu/docs/specs/
A Dacpi_mem_hotplug.rst33 It's valid only when bit 1 is set.
68 if set to 1 clears device insert event, set by OSPM
72 if set to 1 clears device remove event, set by OSPM
76 if set to 1 initiates device eject, set by OSPM when it
85 all bits set to 1.
112 | request | | set eject bit in flags|
118 | set OST event & status | | call device unplug cb |
A Dacpi_cpu_hotplug.rst44 - read accesses return all bits set to 0.
79 It's valid only when bit 0 is set.
87 if set to 1, OSPM requests firmware to perform device eject.
125 if set to 1 clears device insert event, set by OSPM
129 if set to 1 clears device remove event, set by OSPM
133 if set to 1 initiates device eject, set by OSPM when it
135 when bit #4 is set. In case bit #4 were set, it's cleared as
138 if set to 1, OSPM hands over device eject to firmware.
158 following writes to 'Command data' register set OST event
161 following writes to 'Command data' register set OST status
[all …]
/qemu/linux-user/
A Dsignal-common.h37 static inline void target_sigemptyset(target_sigset_t *set) in target_sigemptyset() argument
39 memset(set, 0, sizeof(*set)); in target_sigemptyset()
46 void set_sigmask(const sigset_t *set);
52 target_sigset_t *set, CPUArchState *env);
56 target_sigset_t *set, CPUArchState *env);
70 int do_sigprocmask(int how, const sigset_t *set, sigset_t *oldset);
A Dsignal.c181 sigset_t set; in block_signals() local
187 sigfillset(&set); in block_signals()
208 if (set) { in do_sigprocmask()
227 ts->signal_mask = *set; in do_sigprocmask()
247 ts->signal_mask = *set; in set_sigmask()
1244 sigset_t set; in handle_pending_signal() local
1342 sigset_t set; in process_pending_signals() local
1346 sigfillset(&set); in process_pending_signals()
1390 set = ts->signal_mask; in process_pending_signals()
1391 sigdelset(&set, SIGSEGV); in process_pending_signals()
[all …]
/qemu/tests/tcg/xtensa/
A Dtest_extui.S15 .set shiftimm, 0
17 .set maskimm, 1
20 .set maskimm, maskimm + 1
22 .set shiftimm, shiftimm + 1
/qemu/bsd-user/
A Dsignal.c68 memset(set, 0, sizeof(*set)); in target_sigemptyset()
328 sigset_t set; in block_signals() local
338 sigfillset(&set); in block_signals()
339 sigprocmask(SIG_SETMASK, &set, 0); in block_signals()
881 sigset_t set; in handle_pending_signal() local
965 sigset_t *blocked_set, set; in process_pending_signals() local
970 sigfillset(&set); in process_pending_signals()
971 sigprocmask(SIG_SETMASK, &set, 0); in process_pending_signals()
1011 set = ts->signal_mask; in process_pending_signals()
1012 sigdelset(&set, SIGSEGV); in process_pending_signals()
[all …]
/qemu/tests/rocker/
A Dbridge12 simp ssh tut sw1 --cmd "sudo /sbin/ip link set dev sw1p1 master br0"
13 simp ssh tut sw1 --cmd "sudo /sbin/ip link set dev sw1p2 master br0"
21 simp ssh tut sw1 --cmd "sudo /sbin/bridge link set dev sw1p1 learning off"
22 simp ssh tut sw1 --cmd "sudo /sbin/bridge link set dev sw1p2 learning off"
24 simp ssh tut sw1 --cmd "sudo /sbin/bridge link set dev sw1p1 flood off"
25 simp ssh tut sw1 --cmd "sudo /sbin/bridge link set dev sw1p2 flood off"
/qemu/hw/core/
A Dqdev-properties-system.c242 .set = set_drive,
251 .set = set_drive_iothread,
318 .set = set_chr,
392 .set = set_mac,
480 .set = set_netdev,
519 .set = set_audiodev,
635 .set = set_blocksize,
807 .set = set_reserved_region,
889 .set = set_pci_devfn,
995 .set = set_pci_host_devaddr,
[all …]
/qemu/linux-user/sparc/
A Dsignal.c279 __put_user(set->sig[0], &sf->si_mask); in setup_frame()
337 tswap_sigset(&sf->mask, set); in setup_rt_frame()
382 target_sigset_t set; in do_sigreturn() local
427 __get_user(set.sig[0], &sf->si_mask); in do_sigreturn()
451 sigset_t set; in do_rt_sigreturn() local
493 target_to_host_sigset(&set, &sf->mask); in do_rt_sigreturn()
494 set_sigmask(&set); in do_rt_sigreturn()
607 sigset_t set; in sparc64_set_context() local
620 set_sigmask(&set); in sparc64_set_context()
711 sigset_t set; in sparc64_get_context() local
[all …]
/qemu/linux-user/m68k/
A Dsignal.c127 target_sigset_t *set, CPUM68KState *env) in setup_frame() argument
145 setup_sigcontext(&frame->sc, env, set->sig[0]); in setup_frame()
148 __put_user(set->sig[i], &frame->extramask[i - 1]); in setup_frame()
275 target_sigset_t *set, CPUM68KState *env) in setup_rt_frame() argument
311 __put_user(set->sig[i], &frame->uc.tuc_sigmask.sig[i]); in setup_rt_frame()
333 sigset_t set; in do_sigreturn() local
348 target_to_host_sigset_internal(&set, &target_set); in do_sigreturn()
349 set_sigmask(&set); in do_sigreturn()
367 sigset_t set; in do_rt_sigreturn() local
373 target_to_host_sigset(&set, &frame->uc.tuc_sigmask); in do_rt_sigreturn()
[all …]
/qemu/accel/tcg/
A Dtb-maint.c554 pe = q_tree_lookup(set->tree, &index); in page_trylock_add()
565 q_tree_insert(set->tree, &pe->index, pe); in page_trylock_add()
571 if (set->max == NULL || pe->index > set->max->index) { in page_trylock_add()
572 set->max = pe; in page_trylock_add()
604 struct page_collection *set = g_malloc(sizeof(*set)); in page_collection_lock() local
614 set->max = NULL; in page_collection_lock()
618 q_tree_foreach(set->tree, page_entry_lock, NULL); in page_collection_lock()
634 if (page_trylock_add(set, tb_page_addr0(tb)) || in page_collection_lock()
643 return set; in page_collection_lock()
649 q_tree_destroy(set->tree); in page_collection_unlock()
[all …]
/qemu/linux-user/s390x/
A Dsignal.c173 target_sigset_t *set, CPUS390XState *env) in setup_frame() argument
192 __put_user(set->sig[0], &frame->sc.oldmask[0]); in setup_frame()
242 target_sigset_t *set, CPUS390XState *env) in setup_rt_frame() argument
282 tswap_sigset(&frame->uc.tuc_sigmask, set); in setup_rt_frame()
363 sigset_t set; in do_sigreturn() local
375 target_to_host_sigset_internal(&set, &target_set); in do_sigreturn()
376 set_sigmask(&set); /* ~_BLOCKABLE? */ in do_sigreturn()
389 sigset_t set; in do_rt_sigreturn() local
396 target_to_host_sigset(&set, &frame->uc.tuc_sigmask); in do_rt_sigreturn()
398 set_sigmask(&set); /* ~_BLOCKABLE? */ in do_rt_sigreturn()
/qemu/util/
A Dqemu-progress.c84 sigset_t set; in progress_dummy_init() local
100 sigemptyset(&set); in progress_dummy_init()
101 sigaddset(&set, SIGUSR1); in progress_dummy_init()
102 pthread_sigmask(SIG_UNBLOCK, &set, NULL); in progress_dummy_init()
/qemu/tests/qemu-iotests/
A D133.out30 qemu-io: Cannot set both -r/-w and 'read-only'
31 qemu-io: Cannot set both -r/-w and 'read-only'
32 qemu-io: Cannot set both -c and the cache options
33 qemu-io: Cannot set both -c and the cache options
34 qemu-io: Cannot set both -c and the cache options

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