| /qemu/net/ |
| A D | announce.c | 22 int64_t step; in qemu_announce_timer_step() local
24 step = timer->params.initial + in qemu_announce_timer_step()
26 timer->params.step; in qemu_announce_timer_step()
28 if (step < 0 || step > timer->params.max) { in qemu_announce_timer_step()
29 step = timer->params.max; in qemu_announce_timer_step()
31 timer_mod(timer->tm, qemu_clock_get_ms(timer->type) + step); in qemu_announce_timer_step()
33 return step; in qemu_announce_timer_step()
|
| /qemu/target/arm/tcg/ |
| A D | helper-a64.c | 1282 toaddr += step; in do_setp()
1283 setsize -= step; in do_setp()
1352 toaddr += step; in do_setm()
1353 setsize -= step; in do_setm()
1383 uint64_t step; in do_sete() local
1416 toaddr += step; in do_sete()
1417 setsize -= step; in do_sete()
1655 toaddr += step; in do_cpyp()
1680 toaddr -= step; in do_cpyp()
1761 toaddr += step; in do_cpym()
[all …]
|
| /qemu/util/ |
| A D | qdist.c | 167 double step; in qdist_bin__internal() local
182 step = (xmax - xmin) / n; in qdist_bin__internal()
187 if (from->entries[i].x != xmin + i * step) { in qdist_bin__internal()
204 left = xmin + i * step; in qdist_bin__internal()
205 right = xmin + (i + 1) * step; in qdist_bin__internal()
253 double x1, x2, step; in qdist_pr_label() local
268 step = (qdist_xmax(dist) - qdist_xmin(dist)) / n; in qdist_pr_label()
272 step *= 100.0; in qdist_pr_label()
283 x2 = x + step; in qdist_pr_label()
285 x1 = x - step; in qdist_pr_label()
|
| A D | lockcnt.c | 240 int step = QEMU_LOCKCNT_STATE_LOCKED; in qemu_lockcnt_lock() local
247 while (!qemu_lockcnt_cmpxchg_or_wait(lockcnt, &val, val + step, &waited)) { in qemu_lockcnt_lock()
252 step = QEMU_LOCKCNT_STATE_WAITING; in qemu_lockcnt_lock()
|
| /qemu/io/ |
| A D | channel-command.c | 104 int step = 0; in qio_channel_command_abort() local
123 if (step == 0) { in qio_channel_command_abort()
125 } else if (step == 1) { in qio_channel_command_abort()
133 step++; in qio_channel_command_abort()
|
| /qemu/scripts/simplebench/ |
| A D | bench_write_req.py | 87 step = str(cluster_size)
91 '-S', step, '-f', 'qcow2', image_name]
|
| /qemu/tests/avocado/ |
| A D | migration.py | 38 step=0.1,
42 step=0.1,
|
| /qemu/tests/qtest/ |
| A D | libqtest-single.h | 314 static inline int64_t clock_step(int64_t step) in clock_step() argument
316 return qtest_clock_step(global_qtest, step); in clock_step()
|
| A D | npcm7xx_emc-test.c | 389 static bool emc_wait_irq(QTestState *qts, const EMCModule *mod, int step, in emc_wait_irq() argument
399 qtest_clock_step(qts, step); in emc_wait_irq()
406 static bool emc_wait_mista(QTestState *qts, const EMCModule *mod, int step, in emc_wait_mista() argument
417 qtest_clock_step(qts, step); in emc_wait_mista()
|
| /qemu/tests/qemu-iotests/ |
| A D | 185 | 303 step=$((cluster_size * 2))
307 for ofs in $(seq 0 $step $((size - step))); do
|
| A D | common.pattern | 22 local step=$3
38 local step=$4
|
| A D | 151 | 338 step = math.ceil(1 * 1000 * 1000 * 1000 / self.iops)
357 step = math.ceil(1 * 1000 * 1000 * 1000 / self.iops)
|
| /qemu/docs/system/ |
| A D | gdb.rst | 166 The default single stepping behavior is step with the IRQs and timer
168 single step it expects to advance beyond the current instruction. With
169 the IRQs and timer service routines on, a single step might jump into
173 Because there are rare circumstances where you want to single step into
175 three commands you can query and set the single step behavior:
198 This will change the single step mask, so if wanted to enable IRQs on
199 the single step, but not timers, you would use:
|
| /qemu/scripts/oss-fuzz/ |
| A D | minimize_qtest_trace.py | 119 step = int(writes[0].split()[1], 16) - int(writes[1].split()[1], 16)
121 if step != int(writes[j].split()[1], 16) - \
125 return (int(writes[0].split()[1], 16)+step, length)
|
| /qemu/hw/display/ |
| A D | omap_lcdc.c | 205 int width, linesize, step, bpp, frame_offset; in omap_update_display() local
306 step = width * bpp >> 3; in omap_update_display()
311 height, step); in omap_update_display()
316 step, linesize, 0, in omap_update_display()
|
| /qemu/docs/devel/ |
| A D | tcg.rst | 81 data. The information updated in this step must be inferable from both
90 of step 2's instructions, which update the CPU state information. Step 3,
95 The first time this whole sequence is executed, step 1 simply jumps
96 to step 2. Then the CPU state information gets updated and we exit from
108 ``goto_tb`` step, it will already be patched (assuming the destination TB
121 Note that, on step 3 (``tcg_gen_exit_tb()``), in addition to the
|
| /qemu/include/standard-headers/linux/ |
| A D | virtio_snd.h | 419 uint32_t step; member
428 uint64_t step; member
|
| /qemu/tests/docker/dockerfiles/ |
| A D | python.docker | 23 # As a final step configure the user (if env is defined)
|
| A D | debian-xtensa-cross.docker | 32 # As a final step configure the user (if env is defined)
|
| A D | debian-tricore-cross.docker | 49 # As a final step configure the user (if env is defined)
|
| A D | debian-toolchain.docker | 44 # As a final step configure the user (if env is defined)
|
| /qemu/docs/devel/migration/ |
| A D | dirty-limit.rst | 57 on the results of the calculation supplied by step CALCULATE (2).
60 to step PREPARE (1) until the dirty limit is reached.
|
| /qemu/rust/qemu-api/ |
| A D | meson.build | 34 # Rust executables do not support objects, so add an intermediate step.
|
| /qemu/hw/riscv/ |
| A D | riscv-iommu.c | 263 unsigned char step; in riscv_iommu_spa_fetch() member
313 sc[pass].step = 0; in riscv_iommu_spa_fetch()
384 const unsigned widened = (pass && !sc[pass].step) ? 2 : 0; in riscv_iommu_spa_fetch()
387 (sc[pass].levels - 1 - sc[pass].step); in riscv_iommu_spa_fetch()
394 if (!sc[pass].step) { in riscv_iommu_spa_fetch()
416 sc[pass].step++; in riscv_iommu_spa_fetch()
439 sc[pass].step = sc[pass].levels; in riscv_iommu_spa_fetch()
444 if (pass && sc[0].step != sc[0].levels) { in riscv_iommu_spa_fetch()
468 sc[pass].step = 0; in riscv_iommu_spa_fetch()
475 if (sc[pass].step == sc[pass].levels) { in riscv_iommu_spa_fetch()
[all …]
|
| /qemu/hw/ppc/ |
| A D | spapr_hcall.c | 725 int step = 1 << esize; in h_logical_memop() local
738 step = -step; in h_logical_memop()
775 dst = dst + step; in h_logical_memop()
776 src = src + step; in h_logical_memop()
|