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/qemu/tests/tcg/mips/user/ase/msa/
A Dtest_msa_run_32r5eb.sh8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5eb
9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5eb
10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5eb
11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5eb
12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5eb
13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5eb
14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5eb
15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5eb
16 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_b_32r5eb
17 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_h_32r5eb
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A Dtest_msa_run_32r5el.sh8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5el
9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5el
10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5el
11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5el
12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5el
13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5el
14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5el
15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5el
16 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_b_32r5el
17 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_pcnt_h_32r5el
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A Dtest_msa_run_64r6eb.sh8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6eb
9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6eb
10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6eb
11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6eb
12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6eb
13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6eb
14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6eb
15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6eb
16 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6eb
17 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6eb
[all …]
A Dtest_msa_run_64r6el.sh8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6el
9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6el
10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6el
11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6el
12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6el
13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6el
14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6el
15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6el
16 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6el
17 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6el
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A Dtest_msa_compile_64r6eb.sh7 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_b_64r6eb
9 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_h_64r6eb
11 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_w_64r6eb
13 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_d_64r6eb
15 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_b_64r6eb
17 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_h_64r6eb
19 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_w_64r6eb
21 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_d_64r6eb
23 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_pcnt_b_64r6eb
25 -EB -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_pcnt_h_64r6eb
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A Dtest_msa_compile_64r6el.sh7 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_b_64r6el
9 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_h_64r6el
11 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_w_64r6el
13 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nloc_d_64r6el
15 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_b_64r6el
17 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_h_64r6el
19 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_w_64r6el
21 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_nlzc_d_64r6el
23 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_pcnt_b_64r6el
25 -EL -static -mabi=64 -march=mips64r6 -mmsa -o /tmp/test_msa_pcnt_h_64r6el
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A Dtest_msa_compile_32r5eb.sh8 /tmp/test_msa_nloc_b_32r5eb
11 /tmp/test_msa_nloc_h_32r5eb
14 /tmp/test_msa_nloc_w_32r5eb
17 /tmp/test_msa_nloc_d_32r5eb
20 /tmp/test_msa_nlzc_b_32r5eb
23 /tmp/test_msa_nlzc_h_32r5eb
26 /tmp/test_msa_nlzc_w_32r5eb
29 /tmp/test_msa_nlzc_d_32r5eb
32 /tmp/test_msa_pcnt_b_32r5eb
35 /tmp/test_msa_pcnt_h_32r5eb
[all …]
A Dtest_msa_compile_32r5el.sh8 /tmp/test_msa_nloc_b_32r5el
11 /tmp/test_msa_nloc_h_32r5el
14 /tmp/test_msa_nloc_w_32r5el
17 /tmp/test_msa_nloc_d_32r5el
20 /tmp/test_msa_nlzc_b_32r5el
23 /tmp/test_msa_nlzc_h_32r5el
26 /tmp/test_msa_nlzc_w_32r5el
29 /tmp/test_msa_nlzc_d_32r5el
32 /tmp/test_msa_pcnt_b_32r5el
35 /tmp/test_msa_pcnt_h_32r5el
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/qemu/util/
A Dbitops.c25 unsigned long tmp; in find_next_bit() local
33 tmp = *(p++); in find_next_bit()
38 if (tmp) { in find_next_bit()
46 tmp = *p; in find_next_bit()
50 if (tmp) { in find_next_bit()
70 tmp = *p; in find_next_bit()
98 tmp = *(p++); in find_next_zero_bit()
103 if (~tmp) { in find_next_zero_bit()
119 tmp = *p; in find_next_zero_bit()
142 if (tmp) { in find_last_bit()
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A Dinterval-tree.c232 if (tmp && rb_is_red(tmp)) { in rb_insert_augmented()
292 if (tmp) { in rb_insert_augmented()
300 if (tmp && rb_is_red(tmp)) { in rb_insert_augmented()
328 if (tmp) { in rb_insert_augmented()
536 if (!tmp) { in rb_erase_augmented()
553 tmp = parent; in rb_erase_augmented()
561 tmp = parent; in rb_erase_augmented()
565 if (!tmp) { in rb_erase_augmented()
597 tmp = tmp->rb_left; in rb_erase_augmented()
763 if (tmp) { in interval_tree_subtree_search()
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/qemu/tests/unit/
A Dtest-div128.c163 test_data_unsigned tmp; in test_divu128() local
166 tmp = test_table_unsigned[i]; in test_divu128()
168 rem = divu128(&tmp.low, &tmp.high, tmp.divisor); in test_divu128()
169 g_assert_cmpuint(tmp.low, ==, tmp.rlow); in test_divu128()
170 g_assert_cmpuint(tmp.high, ==, tmp.rhigh); in test_divu128()
171 g_assert_cmpuint(rem, ==, tmp.remainder); in test_divu128()
179 test_data_signed tmp; in test_divs128() local
182 tmp = test_table_signed[i]; in test_divs128()
184 rem = divs128(&tmp.low, &tmp.high, tmp.divisor); in test_divs128()
185 g_assert_cmpuint(tmp.low, ==, tmp.rlow); in test_divs128()
[all …]
A Dtest-shift128.c113 test_data tmp = test_ltable[i]; in test_lshift() local
114 ulshift(&tmp.low, &tmp.high, tmp.shift, &overflow); in test_lshift()
115 g_assert_cmpuint(tmp.low, ==, tmp.rlow); in test_lshift()
116 g_assert_cmpuint(tmp.high, ==, tmp.rhigh); in test_lshift()
117 g_assert_cmpuint(tmp.overflow, ==, overflow); in test_lshift()
126 test_data tmp = test_rtable[i]; in test_rshift() local
127 urshift(&tmp.low, &tmp.high, tmp.shift); in test_rshift()
128 g_assert_cmpuint(tmp.low, ==, tmp.rlow); in test_rshift()
129 g_assert_cmpuint(tmp.high, ==, tmp.rhigh); in test_rshift()
A Dtest-qobject-output-visitor.c341 tmp->integer = 41; in test_visitor_out_union_flat()
399 tmp->u.value_b.onoff = true; in test_visitor_out_union_in_union()
414 UserDefAlternate *tmp; in test_visitor_out_alternate() local
421 tmp->type = QTYPE_QNUM; in test_visitor_out_alternate()
422 tmp->u.i = 42; in test_visitor_out_alternate()
434 tmp->type = QTYPE_QSTRING; in test_visitor_out_alternate()
435 tmp->u.e = ENUM_ONE_VALUE1; in test_visitor_out_alternate()
446 tmp->type = QTYPE_QNULL; in test_visitor_out_alternate()
447 tmp->u.n = qnull(); in test_visitor_out_alternate()
456 tmp->type = QTYPE_QDICT; in test_visitor_out_alternate()
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/qemu/target/sparc/
A Dgdbstub.c111 uint32_t tmp; in sparc_cpu_gdb_write_register() local
113 tmp = ldl_p(mem_buf); in sparc_cpu_gdb_write_register()
115 target_ulong tmp; in sparc_cpu_gdb_write_register() local
117 tmp = ldtul_p(mem_buf); in sparc_cpu_gdb_write_register()
140 env->y = tmp; in sparc_cpu_gdb_write_register()
146 env->wim = tmp; in sparc_cpu_gdb_write_register()
149 env->tbr = tmp; in sparc_cpu_gdb_write_register()
152 env->pc = tmp; in sparc_cpu_gdb_write_register()
155 env->npc = tmp; in sparc_cpu_gdb_write_register()
181 env->pc = tmp; in sparc_cpu_gdb_write_register()
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/qemu/target/arm/tcg/
A Dtranslate-vfp.c1771 gen_vfp_negh(tmp, tmp); in gen_VMLS_hp()
1789 gen_vfp_negs(tmp, tmp); in gen_VMLS_sp()
1807 gen_vfp_negd(tmp, tmp); in gen_VMLS_dp()
1882 gen_vfp_negh(tmp, tmp); in gen_VNMLA_hp()
1898 gen_vfp_negs(tmp, tmp); in gen_VNMLA_sp()
1914 gen_vfp_negd(tmp, tmp); in gen_VNMLA_dp()
2630 gen_helper_bfcvt(tmp, tmp, fpst); in trans_VCVT_b16_f32()
2710 gen_helper_rinth(tmp, tmp, fpst); in trans_VRINTR_hp()
2731 gen_helper_rints(tmp, tmp, fpst); in trans_VRINTR_sp()
2761 gen_helper_rintd(tmp, tmp, fpst); in trans_VRINTR_dp()
[all …]
A Dtranslate-m-nocp.c310 TCGv_i32 tmp; in gen_M_fp_sysreg_write() local
343 tcg_gen_andi_i32(tmp, tmp, FPSR_NZCV_MASK); in gen_M_fp_sysreg_write()
393 tcg_gen_andi_i32(tmp, tmp, ~FPSR_NZCV_MASK); in gen_M_fp_sysreg_write()
433 TCGv_i32 tmp; in gen_M_fp_sysreg_read() local
453 tmp = tcg_temp_new_i32(); in gen_M_fp_sysreg_read()
460 tcg_gen_andi_i32(tmp, tmp, FPSR_NZCVQC_MASK); in gen_M_fp_sysreg_read()
469 tcg_gen_andi_i32(tmp, tmp, FPSR_NZCV_MASK); in gen_M_fp_sysreg_read()
479 tcg_gen_andi_i32(tmp, tmp, ~FPSR_NZCV_MASK); in gen_M_fp_sysreg_read()
483 tcg_gen_or_i32(tmp, tmp, sfpa); in gen_M_fp_sysreg_read()
536 tcg_gen_or_i32(tmp, tmp, sfpa); in gen_M_fp_sysreg_read()
[all …]
A Dtranslate.c427 tcg_gen_and_i32(tmp, tmp, mask); in gen_rev16()
450 tcg_gen_andi_i32(tmp, tmp, 0x8000); in gen_add16()
1401 tcg_gen_ori_i32(tmp, tmp, 2); in IWMMXT_OP()
1409 tcg_gen_ori_i32(tmp, tmp, 1); in gen_op_iwmmxt_set_cup()
3732 gen(tmp, tmp); in op_s_rxr_shi()
3969 tcg_gen_ext16u_i32(tmp, tmp); in trans_MOVT()
5899 gen_extract(tmp, tmp); in op_xta()
5903 gen_add(tmp, tmp, tmp2); in op_xta()
5970 gen(tmp, tmp); in op_rr()
6927 tcg_gen_add_i32(tmp, tmp, tmp); in op_tbranch()
[all …]
/qemu/target/alpha/
A Dtranslate.c891 tcg_gen_neg_i64(tmp, tmp); in gen_ext_h()
892 tcg_gen_andi_i64(tmp, tmp, 0x3f); in gen_ext_h()
912 tcg_gen_shli_i64(tmp, tmp, 3); in gen_ext_l()
1161 tcg_gen_ori_i64(tmp, tmp, 1); in gen_call_pal()
1497 tcg_gen_add_i64(tmp, tmp, vb); in translate_one()
1509 tcg_gen_sub_i64(tmp, tmp, vb); in translate_one()
1525 tcg_gen_add_i64(tmp, tmp, vb); in translate_one()
1532 tcg_gen_sub_i64(tmp, tmp, vb); in translate_one()
1584 tcg_gen_add_i64(tmp, tmp, vc); in translate_one()
1593 tcg_gen_sub_i64(tmp, tmp, vc); in translate_one()
[all …]
/qemu/target/ppc/
A Dpower8-pmu.c142 target_ulong tmp; in pmu_increment_insns() local
145 tmp = env->spr[SPR_POWER_PMC1]; in pmu_increment_insns()
146 tmp += num_insns; in pmu_increment_insns()
151 env->spr[SPR_POWER_PMC1] = tmp; in pmu_increment_insns()
155 tmp = env->spr[SPR_POWER_PMC2]; in pmu_increment_insns()
156 tmp += num_insns; in pmu_increment_insns()
161 env->spr[SPR_POWER_PMC2] = tmp; in pmu_increment_insns()
165 tmp = env->spr[SPR_POWER_PMC3]; in pmu_increment_insns()
166 tmp += num_insns; in pmu_increment_insns()
179 tmp += num_insns; in pmu_increment_insns()
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/qemu/hw/rtc/
A Dm48t59.c193 int tmp; in m48t59_write() local
215 if (tmp >= 0 && tmp <= 59) { in m48t59_write()
224 if (tmp >= 0 && tmp <= 59) { in m48t59_write()
233 if (tmp >= 0 && tmp <= 23) { in m48t59_write()
242 if (tmp != 0) { in m48t59_write()
266 if (tmp >= 0 && tmp <= 59) { in m48t59_write()
285 if (tmp >= 0 && tmp <= 59) { in m48t59_write()
295 if (tmp >= 0 && tmp <= 23) { in m48t59_write()
314 if (tmp != 0) { in m48t59_write()
324 if (tmp >= 1 && tmp <= 12) { in m48t59_write()
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/qemu/tests/tcg/multiarch/
A Dsigbus.c35 int tmp; in main() local
37 tmp = sigaction(SIGBUS, &sa, NULL); in main()
38 assert(tmp == 0); in main()
46 asm volatile("ldxr %w0,[%1]" : "=r"(tmp) : "r"(p) : "memory"); in main()
48 asm volatile("ldl_l %0,0(%1)" : "=r"(tmp) : "r"(p) : "memory"); in main()
50 asm volatile("ldrex %0,[%1]" : "=r"(tmp) : "r"(p) : "memory"); in main()
52 asm volatile("lwarx %0,0,%1" : "=r"(tmp) : "r"(p) : "memory"); in main()
54 asm volatile("lr.w %0,(%1)" : "=r"(tmp) : "r"(p) : "memory"); in main()
58 tmp = *(volatile int *)p; in main()
68 assert(tmp == 0x13121110); in main()
[all …]
/qemu/target/m68k/
A Dtranslate.c964 tcg_gen_shri_i32(tmp, tmp, 16); in gen_load_fp()
1011 tcg_gen_shli_i32(tmp, tmp, 16); in gen_store_fp()
1306 tcg_gen_or_i32(tmp, tmp, QREG_CC_C); in gen_cc_cond()
1341 tcg_gen_or_i32(tmp, tmp, tmp2); in gen_cc_cond()
1472 tcg_gen_addi_i32(tmp, tmp, -1); in DISAS_INSN()
1517 tcg_gen_mul_i32(tmp, tmp, src); in DISAS_INSN()
3929 tcg_gen_rotl_i32(tmp, src, tmp); in DISAS_INSN()
3948 tcg_gen_rotl_i32(tmp, src, tmp); in DISAS_INSN()
4040 tcg_gen_andi_i32(tmp, tmp, 31); in DISAS_INSN()
4158 tcg_gen_andi_i32(tmp, tmp, 31); in DISAS_INSN()
[all …]
/qemu/target/mips/
A Dgdbstub.c81 target_ulong tmp; in mips_cpu_gdb_write_register() local
83 tmp = ldtul_p(mem_buf); in mips_cpu_gdb_write_register()
86 env->active_tc.gpr[n] = tmp; in mips_cpu_gdb_write_register()
101 env->active_fpu.fpr[n - 38].d = tmp; in mips_cpu_gdb_write_register()
112 cpu_mips_store_status(env, tmp); in mips_cpu_gdb_write_register()
116 env->active_tc.LO[0] = tmp; in mips_cpu_gdb_write_register()
119 env->active_tc.HI[0] = tmp; in mips_cpu_gdb_write_register()
122 env->CP0_BadVAddr = tmp; in mips_cpu_gdb_write_register()
126 cpu_mips_store_cause(env, tmp); in mips_cpu_gdb_write_register()
130 env->active_tc.PC = tmp & ~(target_ulong)1; in mips_cpu_gdb_write_register()
[all …]
/qemu/target/hexagon/imported/
A Dsubinsns.idef76 fLOAD(1,8,u,EA,tmp);
77 tmp = fFRAME_UNSCRAMBLE(tmp);
78 fWRITE_LR(fGETWORD(1,tmp));
79 fWRITE_FP(fGETWORD(0,tmp));
84 fLOAD(1,8,u,EA,tmp);
85 tmp = fFRAME_UNSCRAMBLE(tmp);
86 fWRITE_LR(fGETWORD(1,tmp));
92 …tmp;); fBRANCH_SPECULATE_STALL(fLSBOLD(fREAD_P0()),, SPECULATE_NOT_TAKEN,4,0); fEA_REG(fREAD_FP())…
96 …tmp;);fBRANCH_SPECULATE_STALL(fLSBOLDNOT(fREAD_P0()),, SPECULATE_NOT_TAKEN,4,0); fEA_REG(fREAD_FP(…
102 …tmp;) fBRANCH_SPECULATE_STALL(fLSBNEW0,, SPECULATE_NOT_TAKEN , 4,3); fEA_REG(fREAD_FP()); if (fLSB…
[all …]
/qemu/target/hexagon/
A Dgenptr.c356 TCGv one, zero, tmp; in gen_store_conditional4() local
362 tmp = tcg_temp_new(); in gen_store_conditional4()
381 TCGv_i64 one, zero, tmp; in gen_store_conditional8() local
390 tcg_gen_movcond_i64(TCG_COND_EQ, tmp, tmp, hex_llsc_val_i64, in gen_store_conditional8()
1021 tcg_gen_shl_tl(tmp, tmp, sh32); in gen_shl_sat()
1126 tcg_gen_shl_i64(tmp, mask, tmp); in gen_insert_rp()
1129 tcg_gen_and_i64(tmp, tmp, mask); in gen_insert_rp()
1131 tcg_gen_shl_i64(tmp, tmp, offset64); in gen_insert_rp()
1335 tcg_gen_shli_tl(tmp, tmp, reg_field_info[field].offset); in gen_set_usr_field_if()
1367 tcg_gen_movcond_tl(TCG_COND_LT, tmp, source, zero, zero, tmp); in gen_satu_i32()
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