Home
last modified time | relevance | path

Searched refs:B (Results 1 – 25 of 297) sorted by relevance

12345678910>>...12

/u-boot/lib/
A Dsha1.c104 B = ctx->state[1]; in sha1_process_one()
112 P (A, B, C, D, E, W[0]); in sha1_process_one()
113 P (E, A, B, C, D, W[1]); in sha1_process_one()
114 P (D, E, A, B, C, W[2]); in sha1_process_one()
115 P (C, D, E, A, B, W[3]); in sha1_process_one()
116 P (B, C, D, E, A, W[4]); in sha1_process_one()
117 P (A, B, C, D, E, W[5]); in sha1_process_one()
118 P (E, A, B, C, D, W[6]); in sha1_process_one()
119 P (D, E, A, B, C, W[7]); in sha1_process_one()
120 P (C, D, E, A, B, W[8]); in sha1_process_one()
[all …]
A Dsha256.c64 uint32_t A, B, C, D, E, F, G, H; in sha256_process_one() local
108 B = ctx->state[1]; in sha256_process_one()
116 P(A, B, C, D, E, F, G, H, W[0], 0x428A2F98); in sha256_process_one()
117 P(H, A, B, C, D, E, F, G, W[1], 0x71374491); in sha256_process_one()
118 P(G, H, A, B, C, D, E, F, W[2], 0xB5C0FBCF); in sha256_process_one()
119 P(F, G, H, A, B, C, D, E, W[3], 0xE9B5DBA5); in sha256_process_one()
120 P(E, F, G, H, A, B, C, D, W[4], 0x3956C25B); in sha256_process_one()
121 P(D, E, F, G, H, A, B, C, W[5], 0x59F111F1); in sha256_process_one()
122 P(C, D, E, F, G, H, A, B, W[6], 0x923F82A4); in sha256_process_one()
123 P(B, C, D, E, F, G, H, A, W[7], 0xAB1C5ED5); in sha256_process_one()
[all …]
/u-boot/lib/zstd/common/
A Dcpu.h162 B(bmi1, 3)
163 B(hle, 4)
164 B(avx2, 5)
165 B(smep, 7)
166 B(bmi2, 8)
167 B(erms, 9)
169 B(rtm, 11)
170 B(mpx, 14)
174 B(adx, 19)
183 B(sha, 29)
[all …]
/u-boot/arch/arm/dts/
A Dat91sam9x5_macb1.dtsi20 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
21 AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
22 AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
23 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
24 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
25 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
26 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
27 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
28 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
29 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
A Dstm32h7-pinctrl.dtsi50 <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
120 <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
143 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
144 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
145 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
157 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
158 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
159 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
188 <STM32_PINMUX('B', 5, AF5)>;
262 <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */
[all …]
A Dstm32mp13-pinctrl.dtsi62 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
63 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
64 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
65 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
75 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
76 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
77 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
78 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
94 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
95 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
[all …]
A Dstm32f7-pinctrl.dtsi167 pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
168 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
182 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
183 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
188 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
202 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
203 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
261 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
262 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
274 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
[all …]
A Dstm32f4-pinctrl.dtsi227 <STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */
228 <STM32_PINMUX('B', 12, AF1)>; /* TIM1_BKIN */
235 <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
242 <STM32_PINMUX('B', 6, AF4)>; /* I2C1_SCL */
293 <STM32_PINMUX('B', 0, AF9)>,
299 <STM32_PINMUX('B', 1, AF9)>,
307 <STM32_PINMUX('B', 10, AF14)>,
313 <STM32_PINMUX('B', 11, AF14)>,
323 <STM32_PINMUX('B', 8, AF14)>,
325 <STM32_PINMUX('B', 9, AF14)>,
[all …]
A Dat91sam9x5_usart3.dtsi24 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
25 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
30 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
35 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
40 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
A Dstm32mp15-pinctrl.dtsi55 pinmux = <STM32_PINMUX('B', 6, AF5)>;
83 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
91 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
112 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
124 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
133 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
150 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
157 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
501 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
673 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
[all …]
A Dcn9132-db-B.dts6 #include "cn9131-db-B.dts"
10 model = "Marvell CN9132 development board (CP NAND) setup(B)";
11 compatible = "marvell,cn9132-db-B", "marvell,armada-ap806-quad",
A Darmada-common.dtsi19 #define APPEND_NX(A, B) A ##-## B argument
20 #define APPEND(A, B) APPEND_NX(A, B) argument
A Dsama5d3_gmac.dtsi31 … <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
32 … AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
33 … AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
34 … AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
35 … AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
36 … AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
37 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
38 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
61 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
A Dat91sam9263.dtsi415 /* A B */
459 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
464 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
477 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
482 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
497 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
591 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
592 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
598 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
599 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
[all …]
/u-boot/include/
A Dsignatures.h22 #define SIGNATURE_16(A, B) ((A) | (B << 8)) argument
38 #define SIGNATURE_32(A, B, C, D) \ argument
39 (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16))
59 #define SIGNATURE_64(A, B, C, D, E, F, G, H) \ argument
60 (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32))
/u-boot/arch/arm/lib/
A Duldivmod.S39 @ Test if B == 0
42 @ Test if B is power of 2: (B & (B - 1)) == 0
62 @ D_1 = clz B
70 @ B <<= (clz B - clz A)
101 @ B <<= 4
115 @ B <<= 1
126 @ if A >= B
130 @ A -= B
146 @ B >>= 1
171 @ R = A & (B - 1)
[all …]
/u-boot/scripts/kconfig/tests/rand_nested_choice/
A DKconfig7 config B config in choiceb303c70c0104
8 bool "B"
10 if B
31 endif # B
/u-boot/doc/android/
A Dab.rst3 Android A/B updates
9 A/B system updates ensures modern approach for system update. This feature
11 (normally slot A and slot B). The system runs from the current slot while the
14 A/B enablement
17 The A/B updates support can be activated by specifying next options in
29 As a result you can use ``ab_select`` command to ensure A/B boot process in your
30 boot script. This command analyzes and processes A/B metadata stored on a
64 A/B metadata is organized according to AOSP reference [2]_. On the first system
65 start with A/B enabled, when ``misc`` partition doesn't contain required data,
66 the default A/B metadata will be created and written to ``misc`` partition.
/u-boot/doc/board/nxp/
A Dpsb.rst1 i.MX7D/i.MX8MM SRC_GPR10 PERSIST_SECONDARY_BOOT for bootloader A/B switching
55 - BootROM attempts to start bootloader B-copy
57 - if B-copy valid
59 - BootROM starts B-copy
62 - if B-copy NOT valid
111 A-copy and B-copy. For A-copy, this offset is 0x0. For B-copy, this offset
113 in sit-mx8mm.bin, then the B-copy offset is 0x1000 sectors = 2 MiB).
125 B-copy area offset ("firstSectorNumber") is NOT equal to bootloader
126 (image, which is u-boot.imx or flash.bin) B-copy offset.
133 Write bootloader A/B copy and SIT to SD/eMMC
[all …]
/u-boot/arch/x86/include/asm/arch-baytrail/acpi/
A Dirqroute.h17 PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \
20 PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \
22 PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \
23 PCI_DEV_PIRQ_ROUTE(PCU_DEV, A, B, C, D)
26 PCIE_BRIDGE_DEV(RP, PCIE_DEV, A, B, C, D)
/u-boot/board/qualcomm/dragonboard820c/
A Dreadme.txt141 B - 0 - PBL, Start
148 B - 84905 - PBL, End
149 B - 86955 - SBL1, Start
160 B - 415410 - Image Load, Start
164 B - 480161 - PM_SET_VAL:Skip
179 B - 594994 - clock_init, Start
181 B - 598349 - Image Load, Start
183 B - 603808 - Image Load, Start
187 B - 620431 - Image Load, Start
189 B - 675849 - Image Load, Start
[all …]
/u-boot/arch/x86/include/asm/arch-quark/acpi/
A Dirqroute.h11 PCI_DEV_PIRQ_ROUTE(QUARK_DEV_23, A, B, C, D)
14 PCIE_BRIDGE_DEV(RP, QUARK_DEV_23, A, B, C, D)
/u-boot/doc/
A DREADME.gpt97 20 4 B Reserved (ZERO);
105 80 4 B Number of partition entries
106 84 4 B Size of a partition entry (usually 128)
107 88 4 B CRC32 of partition array
110 TOTAL: 512 B
134 0 16 B Partition type GUID (Big Endian)
135 16 16 B Unique partition GUID in (Big Endian)
136 32 8 B First LBA (Little Endian)
137 40 8 B Last LBA (inclusive)
138 48 8 B Attribute flags [+]
[all …]
/u-boot/doc/usage/cmd/
A Dconitrace.rst26 Entering keys <B><SHIFT-B><CTRL-B><X>
/u-boot/scripts/kconfig/tests/auto_submenu/
A Dexpected_stdout9 B (B) [N/y/?] (NEW)

Completed in 67 milliseconds

12345678910>>...12