| /u-boot/include/configs/ |
| A D | MPC8548CDS.h | 107 #define CFG_SYS_FLASH_BASE_PHYS 0xfff000000ull macro
109 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
113 {CFG_SYS_FLASH_BASE_PHYS + 0x800000, CFG_SYS_FLASH_BASE_PHYS}
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| A D | ls1021aqds.h | 30 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
33 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
38 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
61 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \
62 CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
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| A D | T4240RDB.h | 62 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
149 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
155 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
175 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \
176 + 0x8000000, CFG_SYS_FLASH_BASE_PHYS}
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| A D | ls1021atwr.h | 51 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
54 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
76 #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS }
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| A D | ls1046aqds.h | 38 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
54 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
59 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
81 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \
82 CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
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| A D | T208xQDS.h | 86 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
88 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
94 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
114 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \
115 + 0x8000000, CFG_SYS_FLASH_BASE_PHYS}
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| A D | P1010RDB.h | 133 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
135 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
138 #define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
155 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
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| A D | p1_p2_rdb_pc.h | 186 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
188 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
191 #define CFG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) \
196 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
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| A D | P2041RDB.h | 83 #define CFG_SYS_FLASH_BASE_PHYS 0xfe0000000ull macro
85 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
127 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
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| A D | T102xRDB.h | 126 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
128 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
132 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
157 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
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| A D | ls1043aqds.h | 39 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
44 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
65 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \
66 CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
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| A D | T208xRDB.h | 86 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
88 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
109 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS }
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| A D | ls2080a_common.h | 65 #define CFG_SYS_FLASH_BASE_PHYS 0x80000000 macro
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| /u-boot/include/configs/km/ |
| A D | pg-wcom-ls102xa.h | 33 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
36 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
61 #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS }
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| /u-boot/arch/powerpc/cpu/mpc8xxx/ |
| A D | pamu_table.c | 24 #ifdef CFG_SYS_FLASH_BASE_PHYS in construct_pamu_addr_table()
26 (uint64_t)virt_to_phys((void *)CFG_SYS_FLASH_BASE_PHYS); in construct_pamu_addr_table()
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| /u-boot/board/freescale/p1010rdb/ |
| A D | tlb.c | 44 SET_TLB_ENTRY(1, CFG_SYS_FLASH_BASE, CFG_SYS_FLASH_BASE_PHYS,
49 CFG_SYS_FLASH_BASE_PHYS + 0x1000000,
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| A D | law.c | 11 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC),
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| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| A D | law.c | 15 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
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| /u-boot/board/keymile/kmcent2/ |
| A D | law.c | 16 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC),
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| /u-boot/board/freescale/t208xqds/ |
| A D | law.c | 14 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
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| /u-boot/board/freescale/t4rdb/ |
| A D | law.c | 11 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
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| /u-boot/board/freescale/t208xrdb/ |
| A D | law.c | 14 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
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| /u-boot/board/freescale/t102xrdb/ |
| A D | law.c | 12 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
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| /u-boot/board/freescale/t104xrdb/ |
| A D | law.c | 12 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
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| /u-boot/board/freescale/common/p_corenet/ |
| A D | law.c | 14 SET_LAW(CFG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
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