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Searched refs:CFG_SYS_FPGA_CSPR (Results 1 – 11 of 11) sorted by relevance

/u-boot/include/configs/
A Dls1043aqds.h142 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
191 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
225 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
258 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
A Dls1046aqds.h158 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
207 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
241 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
274 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
A Dls1088aqds.h127 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
182 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
201 #define CFG_SYS_CSPR2 CFG_SYS_FPGA_CSPR
238 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
A Dls1021aqds.h130 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
179 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
212 #define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR
A Dls1021atwr.h87 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ macro
115 #define CFG_SYS_CSPR1 CFG_SYS_FPGA_CSPR
A Dls1028ardb.h43 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
A Dls1028aqds.h39 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
A Dls1088ardb.h107 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
140 #define CFG_SYS_CSPR2 CFG_SYS_FPGA_CSPR
/u-boot/board/freescale/ls1046aqds/
A Dls1046aqds.c84 CFG_SYS_FPGA_CSPR,
139 CFG_SYS_FPGA_CSPR,
/u-boot/board/freescale/ls1043aqds/
A Dls1043aqds.c100 CFG_SYS_FPGA_CSPR,
155 CFG_SYS_FPGA_CSPR,
/u-boot/board/freescale/ls1088a/
A Dls1088a.c89 CFG_SYS_FPGA_CSPR,
124 CFG_SYS_FPGA_CSPR,

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