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Searched refs:CFG_SYS_NAND_BASE (Results 1 – 25 of 106) sorted by relevance

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/u-boot/include/configs/
A Dti_armv7_omap.h19 #ifndef CFG_SYS_NAND_BASE
20 #define CFG_SYS_NAND_BASE 0x8000000 macro
A Dls1046afrwy.h17 #define CFG_SYS_NAND_BASE 0x7e800000 macro
18 #define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE
47 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A Ddevkit3250.h38 #define CFG_SYS_NAND_BASE SLC_NAND_BASE macro
39 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A Dls1046ardb.h20 #define CFG_SYS_NAND_BASE 0x7e800000 macro
21 #define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE
50 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A Dpresidio_asic.h61 #define CFG_SYS_NAND_BASE CFG_SYS_FLASH_BASE macro
62 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A DM5329EVB.h86 # define CFG_SYS_NAND_BASE CFG_SYS_CS2_BASE macro
87 # define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A DM5373EVB.h87 # define CFG_SYS_NAND_BASE CFG_SYS_CS2_BASE macro
88 # define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A DP2041RDB.h102 #define CFG_SYS_NAND_BASE 0xffa00000 macro
106 #define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE
109 #define CFG_SYS_NAND_BASE_LIST {CFG_SYS_NAND_BASE}
A Dls1043ardb.h48 #define CFG_SYS_NAND_BASE 0x7e800000 macro
49 #define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE
78 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A DT102xRDB.h184 #define CFG_SYS_NAND_BASE 0xff800000 macro
186 #define CFG_SYS_NAND_BASE_PHYS (0xf00000000ull | CFG_SYS_NAND_BASE)
188 #define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE
229 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A Dkmcent2.h221 #define CFG_SYS_NAND_BASE 0xfa000000 macro
222 #define CFG_SYS_NAND_BASE_PHYS (0xf00000000ull | CFG_SYS_NAND_BASE)
225 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE) | \
266 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
A Dsama5d4_xplained.h20 #define CFG_SYS_NAND_BASE 0x80000000 macro
A Dsama5d4ek.h20 #define CFG_SYS_NAND_BASE 0x80000000 macro
A Dsama5d3_xplained.h32 #define CFG_SYS_NAND_BASE 0x60000000 macro
A Dmcr3000.h39 #define CFG_SYS_NAND_BASE 0x0C000000 macro
A Dsama5d3xek.h41 #define CFG_SYS_NAND_BASE 0x60000000 macro
A Dsama5d2_ptc_ek.h24 #define CFG_SYS_NAND_BASE ATMEL_BASE_CS3 macro
A Dcmpc885.h28 #define CFG_SYS_NAND_BASE 0xC0000000 macro
A Dmx6sabreauto.h34 #define CFG_SYS_NAND_BASE 0x40000000 macro
A Dti816x_evm.h43 #define CFG_SYS_NAND_BASE 0x8000000 macro
A Dat91sam9261ek.h27 #define CFG_SYS_NAND_BASE 0x40000000 macro
A Dat91sam9x5ek.h30 #define CFG_SYS_NAND_BASE 0x40000000 macro
/u-boot/include/configs/km/
A Dpg-wcom-ls102xa.h75 #define CFG_SYS_NAND_BASE 0x68000000 macro
76 #define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE
79 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE) | \
117 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
/u-boot/board/freescale/p1_p2_rdb_pc/
A Dtlb.c70 #ifdef CFG_SYS_NAND_BASE
72 SET_TLB_ENTRY(1, CFG_SYS_NAND_BASE, CFG_SYS_NAND_BASE_PHYS,
/u-boot/drivers/mtd/nand/raw/
A Dkmeter1_nand.c13 #define CFG_NAND_MODE_REG (void *)(CFG_SYS_NAND_BASE + 0x20000)
14 #define CFG_NAND_DATA_REG (void *)(CFG_SYS_NAND_BASE + 0x30000)

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