Home
last modified time | relevance | path

Searched refs:CHIP_REV_1_0 (Results 1 – 11 of 11) sorted by relevance

/u-boot/arch/arm/mach-imx/mx5/
A Dsoc.c48 system_rev |= CHIP_REV_1_0; in get_cpu_rev()
53 system_rev |= CHIP_REV_1_0; in get_cpu_rev()
/u-boot/board/freescale/imx8ulp_evk/
A Dspl.c98 if (is_soc_rev(CHIP_REV_1_0)) in spl_board_init()
/u-boot/arch/arm/include/asm/arch-imx/
A Dcpu.h80 #define CHIP_REV_1_0 0x10 macro
/u-boot/arch/arm/mach-imx/
A Dtimer.c47 if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) || in gpt_has_clk_source_osc()
/u-boot/drivers/cpu/
A Dimx9_cpu.c43 case CHIP_REV_1_0: in get_imx9_rev()
A Dimx8_cpu.c77 revision[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4); in get_imx_rev_str()
/u-boot/arch/arm/mach-imx/imx8ulp/
A Dsoc.c84 return (MXC_CPU_IMX8ULP << 12) | (CHIP_REV_1_0 + rev); in get_cpu_rev()
863 if (is_soc_rev(CHIP_REV_1_0) && ((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_MMC && in spl_arch_boot_image_offset()
/u-boot/arch/arm/mach-imx/imx8m/
A Dsoc.c487 if (reg == CHIP_REV_1_0) { in get_cpu_rev()
508 if (rom_version != CHIP_REV_1_0) { in get_cpu_rev()
1292 if (is_soc_rev(CHIP_REV_1_0)) { in ft_system_setup()
/u-boot/arch/arm/mach-imx/mx6/
A Dsoc.c441 if (is_soc_rev(CHIP_REV_1_0) == 0) { in arch_cpu_init()
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h416 #define ROM_SW_INFO_ADDR is_soc_rev(CHIP_REV_1_0) ? \
/u-boot/arch/arm/mach-imx/imx9/
A Dsoc.c188 (CHIP_REV_1_0 + rev); in get_cpu_rev()

Completed in 34 milliseconds