Searched refs:CK_INFRA_PWM1_SEL (Results 1 – 5 of 5) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7986-clk.h | 159 #define CK_INFRA_PWM1_SEL (5 + CLK_INFRA_NR_CLK) macro
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| A D | mt7981-clk.h | 178 #define CK_INFRA_PWM1_SEL (6 + CLK_INFRA_NR_CLK) macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7986.c | 318 INFRA_FACTOR(CK_INFRA_PWM_CK1, "infra_pwm_ck1", CK_INFRA_PWM1_SEL, 1,
396 INFRA_MUX(CK_INFRA_PWM1_SEL, "infra_pwm1_sel", infra_pwm_bsel_parents,
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| A D | clk-mt7981.c | 327 INFRA_FACTOR(CK_INFRA_PWM_CK1, "infra_pwm_ck1", CK_INFRA_PWM1_SEL, 1,
406 INFRA_MUX(CK_INFRA_PWM1_SEL, "infra_pwm1_sel", infra_pwm1_parents, 0x10,
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| /u-boot/arch/arm/dts/ |
| A D | mt7986.dtsi | 163 <&infracfg CK_INFRA_PWM1_SEL>,
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