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Searched refs:CLKID_UART0 (Results 1 – 10 of 10) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Daxg-clkc.h33 #define CLKID_UART0 24 macro
A Dg12a-clkc.h37 #define CLKID_UART0 28 macro
A Dgxbb-clkc.h32 #define CLKID_UART0 26 macro
/u-boot/drivers/clk/meson/
A Daxg.c34 MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13),
A Dgxbb.c99 MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13),
A Dg12a.c116 MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13),
/u-boot/arch/arm/dts/
A Dmeson-gxbb.dtsi818 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
A Dmeson-gxl.dtsi887 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
A Dmeson-axg.dtsi1872 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
A Dmeson-g12-common.dtsi2317 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;

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