Searched refs:CLK_BUS_UART2 (Results 1 – 25 of 30) sorted by relevance
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| /u-boot/include/dt-bindings/clock/ |
| A D | sun8i-v3s-ccu.h | 73 #define CLK_BUS_UART2 42 macro
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| A D | suniv-ccu-f1c100s.h | 38 #define CLK_BUS_UART2 40 macro
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| A D | sun8i-a23-a33-ccu.h | 83 #define CLK_BUS_UART2 56 macro
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| A D | sun8i-a83t-ccu.h | 92 #define CLK_BUS_UART2 55 macro
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| A D | sun50i-a64-ccu.h | 91 #define CLK_BUS_UART2 69 macro
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| A D | sun50i-h616-ccu.h | 54 #define CLK_BUS_UART2 68 macro
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| A D | sun8i-h3-ccu.h | 96 #define CLK_BUS_UART2 64 macro
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| A D | sun9i-a80-ccu.h | 157 #define CLK_BUS_UART2 126 macro
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| A D | sun50i-h6-ccu.h | 58 #define CLK_BUS_UART2 72 macro
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| A D | sun8i-r40-ccu.h | 121 #define CLK_BUS_UART2 98 macro
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| /u-boot/drivers/clk/sunxi/ |
| A D | clk_f1c100s.c | 28 [CLK_BUS_UART2] = GATE(0x06c, BIT(22)),
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| A D | clk_v3s.c | 32 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
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| A D | clk_a23.c | 34 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
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| A D | clk_a80.c | 43 [CLK_BUS_UART2] = GATE(0x594, BIT(18)),
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| A D | clk_a64.c | 45 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
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| A D | clk_a83t.c | 42 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
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| A D | clk_h6.c | 33 [CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
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| A D | clk_h3.c | 48 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
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| A D | clk_h616.c | 33 [CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
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| A D | clk_r40.c | 54 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
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| /u-boot/arch/arm/dts/ |
| A D | suniv-f1c100s.dtsi | 325 clocks = <&ccu CLK_BUS_UART2>;
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| A D | sun8i-v3s.dtsi | 506 clocks = <&ccu CLK_BUS_UART2>;
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| A D | sun50i-h616.dtsi | 356 clocks = <&ccu CLK_BUS_UART2>;
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| A D | sun8i-a23-a33.dtsi | 514 clocks = <&ccu CLK_BUS_UART2>;
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| A D | sunxi-h3-h5.dtsi | 735 clocks = <&ccu CLK_BUS_UART2>;
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Completed in 38 milliseconds
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