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Searched refs:CLK_NAND (Results 1 – 22 of 22) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7620-clk.h29 #define CLK_NAND 15 macro
A Dstih407-clks.h15 #define CLK_NAND 2 macro
A Dsun5i-ccu.h58 #define CLK_NAND 63 macro
A Dsun8i-a23-a33-ccu.h86 #define CLK_NAND 59 macro
A Dactions,s700-cmu.h53 #define CLK_NAND 32 macro
A Dsun8i-a83t-ccu.h96 #define CLK_NAND 59 macro
A Dsun50i-a64-ccu.h96 #define CLK_NAND 74 macro
A Dsun8i-h3-ccu.h103 #define CLK_NAND 70 macro
A Dsun8i-r40-ccu.h130 #define CLK_NAND 106 macro
A Dsun4i-a10-ccu.h127 #define CLK_NAND 96 macro
/u-boot/drivers/clk/sunxi/
A Dclk_a10s.c39 [CLK_NAND] = GATE(0x080, BIT(31)),
A Dclk_a10.c51 [CLK_NAND] = GATE(0x080, BIT(31)),
A Dclk_a23.c38 [CLK_NAND] = GATE(0x080, BIT(31)),
A Dclk_a64.c49 [CLK_NAND] = GATE(0x080, BIT(31)),
A Dclk_a83t.c46 [CLK_NAND] = GATE(0x080, BIT(31)),
A Dclk_h3.c53 [CLK_NAND] = GATE(0x080, BIT(31)),
A Dclk_r40.c61 [CLK_NAND] = GATE(0x080, BIT(31)),
/u-boot/arch/arm/dts/
A Dsun5i.dtsi207 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
A Dsun8i-a23-a33.dtsi169 clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
A Dsun4i-a10.dtsi273 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
A Dsun7i-a20.dtsi339 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
/u-boot/drivers/clk/renesas/
A Dr9a06g032-clocks.c308 D_GATE(CLK_NAND, "clk_nand", DIV_NAND, RB(0x50, 4),

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