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Searched refs:CLK_TOP_APLL12_CK_DIV6 (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8516-clk.h121 #define CLK_TOP_APLL12_CK_DIV6 97 macro
A Dmt8518-clk.h146 #define CLK_TOP_APLL12_CK_DIV6 124 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8516.c731 GATE_TOP5(CLK_TOP_APLL12_DIV6, CLK_TOP_APLL12_CK_DIV6, 8),
A Dclk-mt8518.c1446 GATE_TOP3(CLK_TOP_APLL12_DIV6, CLK_TOP_APLL12_CK_DIV6, 8),

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