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Searched refs:CLK_TOP_GCPU_SEL (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h100 #define CLK_TOP_GCPU_SEL 89 macro
A Dmt8518-clk.h123 #define CLK_TOP_GCPU_SEL 101 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8518.c1226 MUX(CLK_TOP_GCPU_SEL, gcpu_parents, 0xC8, 0, 3),
1475 GATE_TOP5_I(CLK_TOP_GCPU, CLK_TOP_GCPU_SEL, 26),
A Dclk-mt8512.c551 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_GCPU_SEL, gcpu_parents,

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