Searched refs:CLK_TOP_IRTX_SEL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 114 #define CLK_TOP_IRTX_SEL 100 macro
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| A D | mt7622-clk.h | 96 #define CLK_TOP_IRTX_SEL 83 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 353 MUX_GATE(CLK_TOP_IRTX_SEL, f10m_ref_parents, 0xA0, 24, 1, 31),
453 GATE_PERI1(CLK_PERI_IRTX_PD, CLK_TOP_IRTX_SEL, 2),
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| A D | clk-mt7629.c | 406 MUX_GATE(CLK_TOP_IRTX_SEL, irrx_parents, 0xA0, 24, 1, 31),
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