Searched refs:CLK_TOP_SYSPLL2_D4 (Results 1 – 8 of 8) sorted by relevance
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 108 FACTOR0(CLK_TOP_SYSPLL2_D4, CLK_APMIXED_MAINPLL, 1, 12),
207 CLK_TOP_SYSPLL2_D4,
221 CLK_TOP_SYSPLL2_D4,
234 CLK_TOP_SYSPLL2_D4,
262 CLK_TOP_SYSPLL2_D4,
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| A D | clk-mt7623.c | 113 FACTOR1(CLK_TOP_SYSPLL2_D4, CLK_TOP_SYSPLL_D3, 1, 4),
300 CLK_TOP_SYSPLL2_D4,
366 CLK_TOP_SYSPLL2_D4,
386 CLK_TOP_SYSPLL2_D4,
464 CLK_TOP_SYSPLL2_D4,
|
| A D | clk-mt8512.c | 84 FACTOR0(CLK_TOP_SYSPLL2_D4, CLK_APMIXED_MAINPLL, 1, 12),
193 CLK_TOP_SYSPLL2_D4,
317 CLK_TOP_SYSPLL2_D4,
329 CLK_TOP_SYSPLL2_D4,
|
| A D | clk-mt7622.c | 106 FACTOR0(CLK_TOP_SYSPLL2_D4, CLK_APMIXED_MAINPLL, 1, 12),
207 CLK_TOP_SYSPLL2_D4,
220 CLK_TOP_SYSPLL2_D4,
|
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 43 #define CLK_TOP_SYSPLL2_D4 30 macro
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| A D | mt8512-clk.h | 19 #define CLK_TOP_SYSPLL2_D4 8 macro
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| A D | mt7622-clk.h | 34 #define CLK_TOP_SYSPLL2_D4 22 macro
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| A D | mt7623-clk.h | 38 #define CLK_TOP_SYSPLL2_D4 25 macro
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