Searched refs:CLK_TOP_SYSPLL2_D8 (Results 1 – 8 of 8) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 44 #define CLK_TOP_SYSPLL2_D8 31 macro
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| A D | mt8512-clk.h | 20 #define CLK_TOP_SYSPLL2_D8 9 macro
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| A D | mt7622-clk.h | 35 #define CLK_TOP_SYSPLL2_D8 23 macro
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| A D | mt7623-clk.h | 39 #define CLK_TOP_SYSPLL2_D8 26 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8512.c | 85 FACTOR0(CLK_TOP_SYSPLL2_D8, CLK_APMIXED_MAINPLL, 1, 24),
288 CLK_TOP_SYSPLL2_D8,
387 CLK_TOP_SYSPLL2_D8,
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| A D | clk-mt7623.c | 114 FACTOR1(CLK_TOP_SYSPLL2_D8, CLK_TOP_SYSPLL_D3, 1, 8),
303 CLK_TOP_SYSPLL2_D8,
382 CLK_TOP_SYSPLL2_D8,
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| A D | clk-mt7629.c | 109 FACTOR0(CLK_TOP_SYSPLL2_D8, CLK_APMIXED_MAINPLL, 1, 24),
217 CLK_TOP_SYSPLL2_D8,
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| A D | clk-mt7622.c | 107 FACTOR0(CLK_TOP_SYSPLL2_D8, CLK_APMIXED_MAINPLL, 1, 24),
203 CLK_TOP_SYSPLL2_D8,
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Completed in 19 milliseconds