Searched refs:CLK_TOP_SYSPLL3_D4 (Results 1 – 8 of 8) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 47 #define CLK_TOP_SYSPLL3_D4 34 macro
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| A D | mt8512-clk.h | 22 #define CLK_TOP_SYSPLL3_D4 11 macro
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| A D | mt7622-clk.h | 38 #define CLK_TOP_SYSPLL3_D4 26 macro
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| A D | mt7623-clk.h | 41 #define CLK_TOP_SYSPLL3_D4 28 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 112 FACTOR0(CLK_TOP_SYSPLL3_D4, CLK_APMIXED_MAINPLL, 1, 20),
218 CLK_TOP_SYSPLL3_D4,
282 CLK_TOP_SYSPLL3_D4,
297 CLK_TOP_SYSPLL3_D4,
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| A D | clk-mt7623.c | 116 FACTOR1(CLK_TOP_SYSPLL3_D4, CLK_TOP_SYSPLL_D5, 1, 4),
255 CLK_TOP_SYSPLL3_D4,
302 CLK_TOP_SYSPLL3_D4,
383 CLK_TOP_SYSPLL3_D4,
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| A D | clk-mt7622.c | 110 FACTOR0(CLK_TOP_SYSPLL3_D4, CLK_APMIXED_MAINPLL, 1, 20),
204 CLK_TOP_SYSPLL3_D4,
282 CLK_TOP_SYSPLL3_D4,
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| A D | clk-mt8512.c | 87 FACTOR0(CLK_TOP_SYSPLL3_D4, CLK_APMIXED_MAINPLL, 1, 20),
388 CLK_TOP_SYSPLL3_D4,
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Completed in 14 milliseconds