Searched refs:CLK_USB_PHY0 (Results 1 – 25 of 34) sorted by relevance
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| /u-boot/include/dt-bindings/clock/ |
| A D | sun8i-v3s-ccu.h | 88 #define CLK_USB_PHY0 56 macro
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| A D | suniv-ccu-f1c100s.h | 49 #define CLK_USB_PHY0 49 macro
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| A D | sun5i-ccu.h | 72 #define CLK_USB_PHY0 77 macro
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| A D | sun8i-a23-a33-ccu.h | 101 #define CLK_USB_PHY0 74 macro
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| A D | sun8i-a83t-ccu.h | 114 #define CLK_USB_PHY0 77 macro
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| A D | sun50i-a64-ccu.h | 108 #define CLK_USB_PHY0 86 macro
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| A D | sun50i-h616-ccu.h | 83 #define CLK_USB_PHY0 97 macro
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| A D | sun8i-h3-ccu.h | 121 #define CLK_USB_PHY0 88 macro
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| A D | sun50i-h6-ccu.h | 91 #define CLK_USB_PHY0 105 macro
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| A D | sun6i-a31-ccu.h | 136 #define CLK_USB_PHY0 100 macro
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| A D | sun8i-r40-ccu.h | 148 #define CLK_USB_PHY0 124 macro
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| /u-boot/drivers/clk/sunxi/ |
| A D | clk_f1c100s.c | 30 [CLK_USB_PHY0] = GATE(0x0cc, BIT(1)),
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| A D | clk_a10s.c | 45 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| A D | clk_v3s.c | 36 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| A D | clk_a23.c | 42 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| A D | clk_a31.c | 55 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| A D | clk_a64.c | 53 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| A D | clk_a83t.c | 50 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| A D | clk_h6.c | 49 [CLK_USB_PHY0] = GATE(0xa70, BIT(29)),
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| A D | clk_h3.c | 57 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| A D | clk_h616.c | 53 [CLK_USB_PHY0] = GATE(0xa70, BIT(29)),
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| A D | clk_r40.c | 67 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
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| /u-boot/drivers/usb/host/ |
| A D | ehci-mxs.c | 128 #define CLK_USB_PHY0 62 macro
193 if (clk_id == CLK_USB_PHY0) in ehci_usb_ofdata_to_platdata()
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| /u-boot/arch/arm/dts/ |
| A D | suniv-f1c100s.dtsi | 154 clocks = <&ccu CLK_USB_PHY0>;
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| A D | sun8i-v3s.dtsi | 314 clocks = <&ccu CLK_USB_PHY0>;
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