| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7623.c | 189 CLK_XTAL,
200 CLK_XTAL,
205 CLK_XTAL,
210 CLK_XTAL,
221 CLK_XTAL,
351 CLK_XTAL
369 CLK_XTAL
394 CLK_XTAL
416 CLK_XTAL
470 CLK_XTAL
[all …]
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| A D | clk-mt7622.c | 143 CLK_XTAL,
153 CLK_XTAL,
158 CLK_XTAL,
163 CLK_XTAL,
173 CLK_XTAL,
178 CLK_XTAL,
183 CLK_XTAL,
224 CLK_XTAL
235 CLK_XTAL
248 CLK_XTAL
[all …]
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| A D | clk-mt7629.c | 154 CLK_XTAL,
165 CLK_XTAL,
170 CLK_XTAL,
175 CLK_XTAL,
186 CLK_XTAL,
191 CLK_XTAL,
196 CLK_XTAL,
197 CLK_XTAL,
238 CLK_XTAL
249 CLK_XTAL
[all …]
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| A D | clk-mt7986.c | 32 FIXED_CLK(CK_APMIXED_ARMPLL, CLK_XTAL, 2000000000),
33 FIXED_CLK(CK_APMIXED_NET2PLL, CLK_XTAL, 800000000),
34 FIXED_CLK(CK_APMIXED_MMPLL, CLK_XTAL, 1440000000),
35 FIXED_CLK(CK_APMIXED_SGMPLL, CLK_XTAL, 325000000),
36 FIXED_CLK(CK_APMIXED_WEDMCUPLL, CLK_XTAL, 760000000),
37 FIXED_CLK(CK_APMIXED_NET1PLL, CLK_XTAL, 2500000000),
38 FIXED_CLK(CK_APMIXED_MPLL, CLK_XTAL, 416000000),
39 FIXED_CLK(CK_APMIXED_APLL2, CLK_XTAL, 196608000),
44 FIXED_CLK(CK_TOP_CB_CKSQ_40M, CLK_XTAL, 40000000),
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| A D | clk-mt7981.c | 32 FIXED_CLK(CK_APMIXED_ARMPLL, CLK_XTAL, 1300000000),
33 FIXED_CLK(CK_APMIXED_NET2PLL, CLK_XTAL, 800000000),
34 FIXED_CLK(CK_APMIXED_MMPLL, CLK_XTAL, 720000000),
35 FIXED_CLK(CK_APMIXED_SGMPLL, CLK_XTAL, 325000000),
36 FIXED_CLK(CK_APMIXED_WEDMCUPLL, CLK_XTAL, 208000000),
37 FIXED_CLK(CK_APMIXED_NET1PLL, CLK_XTAL, 2500000000),
38 FIXED_CLK(CK_APMIXED_MPLL, CLK_XTAL, 416000000),
39 FIXED_CLK(CK_APMIXED_APLL2, CLK_XTAL, 196608000),
44 FIXED_CLK(CK_TOP_CB_CKSQ_40M, CLK_XTAL, 40000000),
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| A D | clk-mt8518.c | 65 FIXED_CLK(CLK_TOP_CLK_NULL, CLK_XTAL, 26000000),
68 FIXED_CLK(CLK_TOP_CLK32K, CLK_XTAL, 32000),
72 FACTOR2(CLK_TOP_DMPLL, CLK_XTAL, 1, 1),
107 FACTOR2(CLK_TOP_CLK26M, CLK_XTAL, 1, 1),
108 FACTOR2(CLK_TOP_CLK26M_D2, CLK_XTAL, 1, 2),
109 FACTOR2(CLK_TOP_CLK26M_D4, CLK_XTAL, 1, 4),
110 FACTOR2(CLK_TOP_CLK26M_D8, CLK_XTAL, 1, 8),
111 FACTOR2(CLK_TOP_CLK26M_D793, CLK_XTAL, 1, 793),
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| A D | clk-mt8512.c | 73 FIXED_CLK(CLK_TOP_CLK_NULL, CLK_XTAL, 26000000),
74 FIXED_CLK(CLK_TOP_CLK32K, CLK_XTAL, 32000),
123 FACTOR2(CLK_TOP_CLK26M, CLK_XTAL, 1, 1),
124 FACTOR2(CLK_TOP_SYS_26M_D2, CLK_XTAL, 1, 2),
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| A D | clk-mt8516.c | 63 FIXED_CLK(CLK_TOP_CLK_NULL, CLK_XTAL, 26000000),
107 FACTOR2(CLK_TOP_CLK26M, CLK_XTAL, 1, 1),
108 FACTOR2(CLK_TOP_CLK26M_D2, CLK_XTAL, 1, 2),
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| A D | clk-mtk.h | 11 #define CLK_XTAL 0 macro
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| A D | clk-mt8183.c | 72 FIXED_CLK(CLK_TOP_CLK26M, CLK_XTAL, 26000000),
73 FIXED_CLK(CLK_TOP_ULPOSC, CLK_XTAL, 250000),
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| A D | clk-mtk.c | 339 (mux->parent[index] == CLK_XTAL && in mtk_topckgen_get_mux_rate()
367 (mux->parent[index] == CLK_XTAL && in mtk_infrasys_get_mux_rate()
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| /u-boot/include/dt-bindings/clock/ |
| A D | mt7628-clk.h | 14 #define CLK_XTAL 32 macro
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| A D | mt7620-clk.h | 14 #define CLK_XTAL 32 macro
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| /u-boot/arch/mips/mach-mtmips/mt7628/ |
| A D | init.c | 94 clk.id = CLK_XTAL; in print_cpuinfo()
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| /u-boot/drivers/clk/mtmips/ |
| A D | clk-mt7620.c | 33 [CLK_XTAL] = CLK_SRC_XTAL,
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| A D | clk-mt7628.c | 43 [CLK_XTAL] = CLK_SRC_XTAL,
|