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Searched refs:CVMX_PEXP_SLI_S2M_PORTX_CTL (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-octeon/
A Dcvmx-pcie.c372 sli_s2m_portx_ctl.u64 = CVMX_READ_CSR(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port)); in __cvmx_pcie_rc_initialize_config_space()
376 CVMX_WRITE_CSR(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port), sli_s2m_portx_ctl.u64); in __cvmx_pcie_rc_initialize_config_space()
2388 sli_s2m_portx_ctl.u64 = CVMX_READ_CSR(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port)); in cvmx_pcie_ep_initialize()
2392 CVMX_WRITE_CSR(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port), sli_s2m_portx_ctl.u64); in cvmx_pcie_ep_initialize()
/u-boot/arch/mips/mach-octeon/include/mach/
A Dcvmx-pexp-defs.h1219 static inline u64 CVMX_PEXP_SLI_S2M_PORTX_CTL(unsigned long offset) in CVMX_PEXP_SLI_S2M_PORTX_CTL() function

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