Searched refs:FIFO (Results 1 – 13 of 13) sorted by relevance
9 - cdns,fifo-depth : Size of the data FIFO in words.10 - cdns,fifo-width : Bus width of the data FIFO in bytes.
10 - fdd: FIFO DMA Request Delay14 - fifo-th: DMA FIFO threshold
13 - fifo-depth : To specify the FIFO depth of the controller.
20 - rx-fifo-depth: MAC receive FIFO buffer depth in bytes21 - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
44 FIFO = 1 enumerator
187 read data from the internal FIFO.197 read data from the internal FIFO
102 if (mode == FIFO) in edma3_set_dest()173 if (mode == FIFO) in edma3_set_src()
101 All data is copied between memory and FIFO by the CPU.
620 FIFO and an input FIFO) for I2C and SPI interfaces. The I2C/SPI QUP689 bool "UniPhier FIFO-builtin I2C driver"693 Support for UniPhier FIFO-builtin I2C controller driver.
377 provides a common data path (an output FIFO and an input FIFO)546 controller support 8 bit SPI transfers only, with or w/o FIFO.
72 MSFF, 1, // Motion Sense has FIFO
110 pasting longer strings, even when the RX FIFO of the UART is966 Driver works in FIFO mode.
1246 are taken from the back. This results in LRU or FIFO allocation
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