Searched refs:FSL_DDR_CS0_CS1_AND_CS2_CS3 (Results 1 – 5 of 5) sorted by relevance

/u-boot/include/
A D	fsl_ddr_sdram.h	85 #define FSL_DDR_CS0_CS1_AND_CS2_CS3 (FSL_DDR_CS0_CS1 | FSL_DDR_CS2_CS3) macro 86 #define FSL_DDR_CS0_CS1_CS2_CS3 (FSL_DDR_CS0_CS1_AND_CS2_CS3 | 0x04)
/u-boot/drivers/ddr/fsl/
A D	util.c	321 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in print_ddr_info()
A D	options.c	1209 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_AND_CS2_CS3; in populate_memctl_options() 1269 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in populate_memctl_options()
A D	main.c	397 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in __step_assign_addresses()
A D	ctrl_regs.c	2390 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in compute_fsl_memctl_config_regs() 2417 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in compute_fsl_memctl_config_regs()

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