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Searched refs:GPIO1_BASE_ADDR (Results 1 – 15 of 15) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imxrt/
A Dimx-regs.h12 #define GPIO1_BASE_ADDR 0x401B8000 macro
/u-boot/arch/arm/include/asm/arch-imx8/
A Dimx-regs.h15 #define GPIO1_BASE_ADDR 0x5D080000 macro
/u-boot/arch/arm/mach-imx/mx5/
A Dsoc.c39 if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0) in get_cpu_rev()
A Dlowlevel_init.S382 ldr r0, =GPIO1_BASE_ADDR
/u-boot/board/freescale/ls1012afrdm/
A Deth.c33 struct ccsr_gpio *pgpio = (void *)(GPIO1_BASE_ADDR); in ls1012afrdm_reset_phy()
/u-boot/drivers/gpio/
A Dmxc_gpio.c44 [0] = GPIO1_BASE_ADDR,
352 { 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
/u-boot/board/dhelectronics/dh_imx8mp/
A Dimx8mp_dhcom_pdk2.c141 is_gigabit = !(readl(GPIO1_BASE_ADDR) & BIT(24)); in dh_dt_patch_som_eqos()
/u-boot/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h60 #define GPIO1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) macro
/u-boot/arch/arm/include/asm/arch-mx27/
A Dimx-regs.h446 #define GPIO1_BASE_ADDR 0x10015000 macro
/u-boot/arch/arm/include/asm/arch-vf610/
A Dimx-regs.h88 #define GPIO1_BASE_ADDR (AIPS0_BASE_ADDR + 0x000FF040) macro
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h18 #define GPIO1_BASE_ADDR 0X30200000 macro
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch2.h77 #define GPIO1_BASE_ADDR (CONFIG_SYS_IMMR + 0x1300000) macro
/u-boot/arch/arm/include/asm/arch-mx31/
A Dimx-regs.h685 #define GPIO1_BASE_ADDR 0x53FCC000 macro
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h182 #define GPIO1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x1C000) macro
/u-boot/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h88 #define GPIO1_BASE_ADDR AIPS1_OFF_BASE_ADDR macro

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