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Searched refs:K210_CLK_PLL2 (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dk210-sysctl.h15 #define K210_CLK_PLL2 2 macro
/u-boot/drivers/clk/
A Dclk_k210.c232 MUX_PARENTS(K210_CLK_PLL2, K210_SYSCTL_PLL2, 26, 2, \
366 [K210_CLK_PLL2] = {
369 .mux = MUXIFY(K210_CLK_PLL2),
386 CLK_NOMUX(K210_CLK_I2S0, "i2s0", K210_CLK_PLL2),
387 CLK_NOMUX(K210_CLK_I2S1, "i2s1", K210_CLK_PLL2),
388 CLK_NOMUX(K210_CLK_I2S2, "i2s2", K210_CLK_PLL2),
397 CLK_DIV(K210_CLK_I2S0_M, "i2s0_m", K210_CLK_PLL2),
398 CLK_DIV(K210_CLK_I2S1_M, "i2s1_m", K210_CLK_PLL2),
399 CLK_DIV(K210_CLK_I2S2_M, "i2s2_m", K210_CLK_PLL2),
/u-boot/doc/board/sipeed/
A Dmaix.rst550 assigned-clocks = <&sysclk K210_CLK_PLL1>, <&sysclk K210_CLK_PLL2>;

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