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Searched refs:LPDDR4_PHY_VREF_VALUE (Results 1 – 7 of 7) sorted by relevance

/u-boot/board/beacon/imx8mm/
A Dlpddr4_timing.c1054 { 0x54006, LPDDR4_PHY_VREF_VALUE },
1129 { 0x54006, LPDDR4_PHY_VREF_VALUE },
1204 { 0x54006, LPDDR4_PHY_VREF_VALUE },
1279 { 0x54006, LPDDR4_PHY_VREF_VALUE },
/u-boot/board/mntre/imx8mq_reform2/
A Dlpddr4_timing.c283 { 0x54006, LPDDR4_PHY_VREF_VALUE },
323 { 0x54006, LPDDR4_PHY_VREF_VALUE },
362 { 0x54006, LPDDR4_PHY_VREF_VALUE },
/u-boot/board/purism/librem5/
A Dlpddr4_timing.c340 { 0x54006, LPDDR4_PHY_VREF_VALUE },
447 { 0x54006, LPDDR4_PHY_VREF_VALUE },
528 { 0x54006, LPDDR4_PHY_VREF_VALUE },
605 { 0x54006, LPDDR4_PHY_VREF_VALUE },
A Dlpddr4_timing_b0.c329 { 0x54006, LPDDR4_PHY_VREF_VALUE },
407 { 0x54006, LPDDR4_PHY_VREF_VALUE },
483 { 0x54006, LPDDR4_PHY_VREF_VALUE },
/u-boot/board/freescale/imx8mq_evk/
A Dlpddr4_timing.c340 { 0x54006, LPDDR4_PHY_VREF_VALUE },
447 { 0x54006, LPDDR4_PHY_VREF_VALUE },
528 { 0x54006, LPDDR4_PHY_VREF_VALUE },
605 { 0x54006, LPDDR4_PHY_VREF_VALUE },
A Dlpddr4_timing_b0.c329 { 0x54006, LPDDR4_PHY_VREF_VALUE },
407 { 0x54006, LPDDR4_PHY_VREF_VALUE },
483 { 0x54006, LPDDR4_PHY_VREF_VALUE },
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dlpddr4_define.h78 #define LPDDR4_PHY_VREF_VALUE 17 macro

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