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Searched refs:LPDDR4_RON (Results 1 – 5 of 5) sorted by relevance

/u-boot/board/purism/librem5/
A Dlpddr4_timing.c362 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
364 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
373 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
375 { 0x54020, (((LPDDR4_RON) << 3) | 0x1) },
468 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1)/*0x31*/ },
548 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
555 { 0x54020, (((LPDDR4_RON) << 3) | 0x1) },
626 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
628 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
637 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
[all …]
A Dlpddr4_timing_b0.c349 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
356 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
376 { 0x54033, ((((LPDDR4_RON) << 3) | 0x3) << 8) | 0x2d },
382 { 0x54039, ((((LPDDR4_RON) << 3) | 0x3) << 8) | 0x2d },
427 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
433 { 0x54020, (((LPDDR4_RON) << 3) | 0x1) },
453 { 0x54033, ((((LPDDR4_RON) << 3) | 0x1) << 8) | 0x09 },
459 { 0x54039, ((((LPDDR4_RON) << 3) | 0x1) << 8) | 0x09 },
504 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
511 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
[all …]
/u-boot/board/freescale/imx8mq_evk/
A Dlpddr4_timing.c362 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
364 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
373 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
375 { 0x54020, (((LPDDR4_RON) << 3) | 0x1) },
468 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1)/*0x31*/ },
548 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
555 { 0x54020, (((LPDDR4_RON) << 3) | 0x1) },
626 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
628 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
637 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
[all …]
A Dlpddr4_timing_b0.c349 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
356 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
376 { 0x54033, ((((LPDDR4_RON) << 3) | 0x3) << 8) | 0x2d },
382 { 0x54039, ((((LPDDR4_RON) << 3) | 0x3) << 8) | 0x2d },
427 { 0x5401a, (((LPDDR4_RON) << 3) | 0x1) },
433 { 0x54020, (((LPDDR4_RON) << 3) | 0x1) },
453 { 0x54033, ((((LPDDR4_RON) << 3) | 0x1) << 8) | 0x09 },
459 { 0x54039, ((((LPDDR4_RON) << 3) | 0x1) << 8) | 0x09 },
504 { 0x5401a, (((LPDDR4_RON) << 3) | 0x3) },
511 { 0x54020, (((LPDDR4_RON) << 3) | 0x3) },
[all …]
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dlpddr4_define.h76 #define LPDDR4_RON LPDDR4_RON40 macro

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