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Searched refs:M3 (Results 1 – 25 of 36) sorted by relevance

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/u-boot/board/ti/dra7xx/
A Dmux_data.h15 {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */
16 {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */
17 {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */
18 {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */
19 {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */
20 {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */
21 {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */
22 {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */
23 {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */
24 {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */
[all …]
/u-boot/board/ti/panda/
A Dpanda.c92 writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0); in get_board_revision()
93 writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT); in get_board_revision()
104 writew((IEN | M3), (*ctrl)->control_padconf_core_base + in get_board_revision()
106 writew((IEN | M3), (*ctrl)->control_padconf_core_base + in get_board_revision()
108 writew((IEN | M3), (*ctrl)->control_padconf_core_base + in get_board_revision()
122 writew((IEN | M3), (*ctrl)->control_padconf_core_base + in get_board_revision()
157 writew((IEN | M3), in is_panda_es_rev_b3()
A Dpanda_mux_data.h65 {UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */
66 {GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */
67 {FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */
82 {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */
/u-boot/board/ti/am57xx/
A Dmux_data.h103 {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */
109 {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */
111 {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */
166 {MCASP4_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_aclkx.uart8_rxd */
167 {MCASP4_FSX, (M3 | PIN_OUTPUT)}, /* mcasp4_fsx.uart8_txd */
168 {MCASP4_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_axr0.uart8_ctsn */
169 {MCASP4_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp4_axr1.uart8_rtsn */
170 {MCASP5_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_aclkx.uart9_rxd */
171 {MCASP5_FSX, (M3 | PIN_OUTPUT)}, /* mcasp5_fsx.uart9_txd */
172 {MCASP5_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_axr0.uart9_ctsn */
[all …]
/u-boot/board/ti/beagle/
A Dbeagle.h392 MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M3)) /*DSS_DATA0*/\
393 MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M3)) /*DSS_DATA1*/\
394 MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M3)) /*DSS_DATA2*/\
395 MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M3)) /*DSS_DATA3*/\
396 MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M3)) /*DSS_DATA4*/\
397 MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M3)) /*DSS_DATA5*/\
398 MUX_VAL(CP(SYS_BOOT0), (IDIS | PTD | DIS | M3)) /*DSS_DATA18*/\
399 MUX_VAL(CP(SYS_BOOT1), (IDIS | PTD | DIS | M3)) /*DSS_DATA19*/\
400 MUX_VAL(CP(SYS_BOOT3), (IDIS | PTD | DIS | M3)) /*DSS_DATA20*/\
401 MUX_VAL(CP(SYS_BOOT4), (IDIS | PTD | DIS | M3)) /*DSS_DATA21*/\
[all …]
/u-boot/doc/
A DREADME.rmobile31 | R8A7796 M3-W | Renesas Electronics Salvator-X | r8a7796_salvator-x_defconfig
32 | R8A7796 M3-W | Renesas Electronics ULCB | r8a7796_ulcb
34 | R8A77965 M3-N | Renesas Electronics Salvator-XS | r8a77965_salvator-x_defconfig
35 | R8A77965 M3-N | Renesas Electronics ULCB | r8a77965_ulcb
/u-boot/arch/xtensa/include/asm/arch-dc232b/
A Dtie-asm.h51 rsr \at2, M3
94 wsr \at2, M3
/u-boot/arch/xtensa/include/asm/arch-de212/
A Dtie-asm.h80 rsr.M3 \at1 // MAC16 option
135 wsr.M3 \at1 // MAC16 option
/u-boot/board/ti/omap3evm/
A Devm.h281 MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)) /*HSUSB2_DATA2*/\
282 MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)) /*HSUSB2_DATA7*/\
283 MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)) /*HSUSB2_DATA4*/\
284 MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)) /*HSUSB2_DATA5*/\
285 MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)) /*HSUSB2_DATA6*/\
286 MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)) /*HSUSB2_DATA3*/\
287 MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
288 MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
289 MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DIR*/\
290 MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_NXT*/\
[all …]
/u-boot/board/timll/devkit8000/
A Ddevkit8000.h275 MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB1_STP*/\
276 MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | EN | M3)) /*HSUSB1_CLK*/\
277 MUX_VAL(CP(ETK_D0_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_DATA0*/\
278 MUX_VAL(CP(ETK_D1_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_DATA1*/\
279 MUX_VAL(CP(ETK_D2_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_DATA2*/\
280 MUX_VAL(CP(ETK_D3_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_DATA7*/\
281 MUX_VAL(CP(ETK_D4_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_DATA4*/\
282 MUX_VAL(CP(ETK_D5_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_DATA5*/\
283 MUX_VAL(CP(ETK_D6_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_DATA6*/\
285 MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | DIS | M3)) /*HSUSB1_DIR*/\
[all …]
/u-boot/arch/arm/dts/
A Dr8a77965-salvator-x.dts3 * Device Tree Source for the Salvator-X board with R-Car M3-N
A Dr8a77960-salvator-x.dts3 * Device Tree Source for the Salvator-X board with R-Car M3-W
A Dr8a77965-ulcb.dts3 * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board with R-Car M3-N
A Dr8a77960-ulcb.dts3 * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W
A Dimx6q-logicpd.dts11 model = "Logic PD i.MX6QD SOM-M3";
A Dsun7i-a20-m3.dts53 model = "Mele M3";
/u-boot/arch/xtensa/include/asm/arch-dc233c/
A Dtie-asm.h87 rsr \at1, M3 // MAC16 option
152 wsr \at1, M3 // MAC16 option
/u-boot/arch/arm/mach-rockchip/rk3288/
A DKconfig14 WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
34 EC (Cortex-M3) to provide access to the keyboard and battery
45 EC (Cortex-M3) to provide access to the keyboard and battery
/u-boot/board/ti/sdp4430/
A Dsdp4430_mux_data.h63 {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */
/u-boot/arch/arm/mach-rockchip/rk3399/
A DKconfig14 display. It includes a Chrome OS EC (Cortex-M3) to provide access to
25 a Chromium OS EC (Cortex-M3) to provide access to the keyboard and
/u-boot/arch/x86/include/asm/arch-braswell/
A Dgpio.h17 M3, enumerator
/u-boot/arch/arm/include/asm/arch-omap5/
A Dmux_omap5.h42 #define M3 3 macro
A Dmux_dra7xx.h32 #define M3 3 macro
/u-boot/arch/arm/include/asm/arch-omap4/
A Dmux_omap4.h50 #define M3 3 macro
/u-boot/arch/arm/include/asm/arch-omap3/
A Dmux.h44 #define M3 3 macro

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