Home
last modified time | relevance | path

Searched refs:M6 (Results 1 – 10 of 10) sorted by relevance

/u-boot/board/ti/am57xx/
A Dmux_data.h561 {GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */
562 {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */
563 {GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a2.vin4b_d2 */
564 {GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a3.vin4b_d3 */
565 {GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a4.vin4b_d4 */
566 {GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a5.vin4b_d5 */
567 {GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a6.vin4b_d6 */
568 {GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a7.vin4b_d7 */
781 {GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */
782 {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */
[all …]
/u-boot/arch/x86/include/asm/arch-braswell/
A Dgpio.h20 M6, enumerator
/u-boot/arch/arm/include/asm/arch-omap5/
A Dmux_omap5.h45 #define M6 6 macro
A Dmux_dra7xx.h35 #define M6 6 macro
/u-boot/arch/arm/include/asm/arch-omap4/
A Dmux_omap4.h53 #define M6 6 macro
/u-boot/board/freescale/lx2160a/
A DREADME155 2 |Mezzanine:X-M6-PCIE-X8 (29737) *
185 2 |Mezzanine:X-M6-PCIE-X8 (29737) *
304 2 |Mezzanine:X-M6-PCIE-X8 (29737) *
/u-boot/arch/arm/include/asm/arch-omap3/
A Dmux.h47 #define M6 6 macro
/u-boot/board/ti/dra7xx/
A Dmux_data.h142 {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
336 {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
704 {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
890 {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
/u-boot/arch/arm/dts/
A Dk3-am654-base-board.dts169 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
/u-boot/board/intel/cherryhill/
A Dcherryhill.c98 GPIO_PAD_CONF("N17: GPIO_SUS3", NATIVE, M6, NA, NA, NA,

Completed in 42 milliseconds