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Searched refs:MEMCTL_SDRAM_CFG1_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-mtmips/
A Dddr_init.c78 clrbits_32(memc + MEMCTL_SDRAM_CFG1_REG, RBC_MAPPING); in mc_ddr_init()
212 writel(cfg1, memc + MEMCTL_SDRAM_CFG1_REG); in mc_sdr_init()
214 while (!(readl(memc + MEMCTL_SDRAM_CFG1_REG) & SDRAM_INIT_DONE)) in mc_sdr_init()
/u-boot/arch/mips/mach-mtmips/include/mach/
A Dmc.h31 #define MEMCTL_SDRAM_CFG1_REG 0x04 macro

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