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Searched refs:MUX_MODE7 (Results 1 – 25 of 36) sorted by relevance

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/u-boot/arch/arm/dts/
A Dam335x-shc.dts522 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE7)
526 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7)
527 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_OUTPUT, MUX_MODE7)
528 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE7)
530 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)
531 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7)
533 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT, MUX_MODE7)
534 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7)
535 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)
536 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT, MUX_MODE7)
[all …]
A Dam335x-sancloud-bbe-common.dtsi28 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
29 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
30 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
31 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
32 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
33 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
34 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
36 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
37 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
38 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
[all …]
A Dam335x-evmsk.dts250 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
251 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
252 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
253 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
254 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
255 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
256 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
257 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
258 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
259 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
[all …]
A Dam437x-idk-evm.dts138 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
139 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
152 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
153 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
171 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
172 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
173 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
174 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
175 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
176 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
[all …]
A Dam335x-chiliboard.dts59 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
60 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
61 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
62 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
63 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
64 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
65 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
66 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
67 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
83 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
[all …]
A Dam437x-sk-evm.dts270 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
271 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
272 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
273 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
274 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
275 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
276 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
277 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
278 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
279 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
[all …]
A Dam335x-guardian.dts403 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT, MUX_MODE7)
404 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT, MUX_MODE7)
413 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE7)
414 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE7)
415 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE7)
418 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT, MUX_MODE7)
474 (AM335X_PIN_LCD_DATA0, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
476 (AM335X_PIN_LCD_DATA1, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
478 (AM335X_PIN_LCD_DATA2, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
518 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_OUTPUT, MUX_MODE7)
[all …]
A Dam335x-draco.dts80 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
81 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
82 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
83 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
84 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
85 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
86 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
101 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
102 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
109 0x148 (PIN_INPUT | MUX_MODE7) /* mdio_data.mdio_data GPIO0_0 */
[all …]
A Dam437x-gp-evm.dts189 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
190 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
191 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
192 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
193 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
194 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
195 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
196 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
197 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
198 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
[all …]
A Dam335x-sl50.dts186 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
189 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
190 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
191 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
192 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
195 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
196 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
197 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
198 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
213 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
[all …]
A Dam335x-baltos.dts120 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
121 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
122 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
123 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
124 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
125 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
126 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
127 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
128 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
129 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
[all …]
A Dam335x-icev2.dts218 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
220 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
229 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)
230 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
231 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
232 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE7)
233 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
234 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
235 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
250 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
[all …]
A Dam335x-bone-common.dtsi128 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
131 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
132 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
133 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
134 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
137 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
138 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
139 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
140 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
155 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
[all …]
A Dam335x-regor.dtsi44 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_22 */
45 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsx.gpio3_15 */
115 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7) /* gpmc_ad11.gpio0_27 */
116 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
118 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT, MUX_MODE7) /* gpmc_ad8.gpio0_22 */
120 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad15.gpio1_15 */
121 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad14.gpio1_14 */
122 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad13.gpio1_13 */
123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad12.gpio1_12 */
[all …]
A Dam335x-rut.dts438 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
439 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
440 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
441 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
442 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
443 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
444 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
445 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
460 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
461 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
[all …]
A Dam335x-pxm2.dtsi408 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
409 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
410 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
411 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
412 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
413 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
414 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
415 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
416 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
417 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
[all …]
A Dam43x-epos-evm.dts164 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
165 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
166 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
167 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
168 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
169 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
170 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
171 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
172 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
187 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
[all …]
A Dam335x-evm.dts260 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
262 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
263 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
264 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
265 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
268 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
269 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
270 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
271 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
286 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
[all …]
A Dam335x-boneblue.dts121 …AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
122 …AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
123 …AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
124 …AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
128 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, …
130 …AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, B…
131 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, …
184 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
216 …AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* (K17) gmii1_txd0.gpio0[28] -…
232 …AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* (K16) gmii1_txd1.gpio0[21] …
[all …]
A Dam335x-boneblack-wireless.dts33 …AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN …
59 …AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_E…
60 …AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_refclk.gpio0_29 W…
61 …AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BU…
A Dam335x-bonegreen-wireless.dts32 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_ad12.gpio1_28 BT_EN */
58 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN */
59 …AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ */
60 …AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_csn0.gpio1_29 LS_BUF_EN…
A Dam335x-pocketbeagle.dts84 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
115 …AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 …
116 …AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 …
117 …AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 …
118 …AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 …
A Dam335x-sancloud-bbe.dts22 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
28 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */
A Dam335x-base0033.dts77 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
78 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn3.gpio2_0 */
/u-boot/include/dt-bindings/pinctrl/
A Dam43xx.h15 #define MUX_MODE7 7 macro

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