| /u-boot/drivers/pci/ |
| A D | pcie_octeon.c | 34 if ((PCI_BUS(bdf) == first_busno) && (PCI_DEV(bdf) > 0)) in octeon_bdf_invalid() 50 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_octeon_write_config() 58 cvmx_pcie_config_write8(port, busno, PCI_DEV(bdf), in pcie_octeon_write_config() 62 cvmx_pcie_config_write16(port, busno, PCI_DEV(bdf), in pcie_octeon_write_config() 66 cvmx_pcie_config_write32(port, busno, PCI_DEV(bdf), in pcie_octeon_write_config() 94 *valuep = cvmx_pcie_config_read8(port, busno, PCI_DEV(bdf), in pcie_octeon_read_config() 98 *valuep = cvmx_pcie_config_read16(port, busno, PCI_DEV(bdf), in pcie_octeon_read_config() 102 *valuep = cvmx_pcie_config_read32(port, busno, PCI_DEV(bdf), in pcie_octeon_read_config() 110 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, *valuep); in pcie_octeon_read_config()
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| A D | pci_octeontx.c | 93 if (PCI_BUS(bdf) == 1 && PCI_DEV(bdf) > 0) in octeontx_bdf_invalid() 108 PCI_DEV(bdf), PCI_FUNC(bdf), offset); in octeontx_ecam_read_config() 126 PCI_DEV(bdf), PCI_FUNC(bdf), offset); in octeontx_ecam_write_config() 130 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, value); in octeontx_ecam_write_config() 152 PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4; in octeontx_pem_read_config() 177 PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4; in octeontx_pem_write_config() 192 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, in octeontx_pem_write_config() 212 PCI_DEV(bdf), PCI_FUNC(bdf), offset); in octeontx2_pem_read_config() 216 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, in octeontx2_pem_read_config() 234 PCI_DEV(bdf), PCI_FUNC(bdf), offset); in octeontx2_pem_write_config() [all …]
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| A D | pcie_phytium.c | 39 addr += PCIE_ECAM_OFFSET(PCI_BUS(parent), PCI_DEV(parent), PCI_FUNC(parent), 0); in phytium_pci_skip_dev() 85 unsigned int dev_no = PCI_DEV(bdf); in pci_phytium_conf_address() 90 addr += PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), 0); in pci_phytium_conf_address()
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| A D | pci_auto.c | 231 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), in dm_pciauto_exp_link_stable() 319 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in dm_pciauto_exp_fixup_link() 322 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in dm_pciauto_exp_fixup_link() 335 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in dm_pciauto_exp_fixup_link() 338 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in dm_pciauto_exp_fixup_link() 541 PCI_DEV(dm_pci_get_bdf(dev))); in dm_pciauto_config_device() 559 PCI_DEV(dm_pci_get_bdf(dev))); in dm_pciauto_config_device() 566 PCI_DEV(dm_pci_get_bdf(dev))); in dm_pciauto_config_device()
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| A D | pci_mpc85xx.c | 31 if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && in mpc85xx_pci_dm_read_config() 37 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset); in mpc85xx_pci_dm_read_config() 67 if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && in mpc85xx_pci_dm_write_config() 71 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset); in mpc85xx_pci_dm_write_config()
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| A D | pcie_intel_fpga.c | 98 if (IS_ROOT_PORT(pcie, bdf) && PCI_DEV(bdf) == 0 && in intel_fpga_pcie_hide_rc_bar() 130 if (IS_ROOT_PORT(pcie, bdf) && PCI_DEV(bdf) > 0) in intel_fpga_pcie_addr_valid() 133 if ((PCI_BUS(bdf) == pcie->first_busno + 1) && PCI_DEV(bdf) > 0) in intel_fpga_pcie_addr_valid() 208 headers[2] = TLP_CFG_DW2(busno, PCI_DEV(bdf), PCI_FUNC(bdf), offset); in tlp_cfg_dword_read() 223 headers[2] = TLP_CFG_DW2(busno, PCI_DEV(bdf), PCI_FUNC(bdf), offset); in tlp_cfg_dword_write() 314 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in _pcie_intel_fpga_write_config() 337 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_intel_fpga_read_config()
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| A D | pci_gt64120.c | 50 unsigned int dev = PCI_DEV(bdf); in gt_config_access() 63 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); in gt_config_access() 109 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); in gt_config_access()
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| A D | pcie_layerscape_fixup.c | 199 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in fdt_fixup_pcie_device_ls() 207 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in fdt_fixup_pcie_device_ls() 403 PCI_DEV(entry->bdf), 0), &pf_dev)) { in get_vf_offset_and_stride() 469 PCI_DEV(entry->bdf), PCI_FUNC(entry->bdf)); in fdt_fixup_pci_vfs() 494 PCI_DEV(entry->bdf), PCI_FUNC(entry->bdf)); in fdt_fixup_pci_vfs() 548 PCI_BUS(bdf), PCI_DEV(bdf), in fdt_fixup_pcie_ls() 565 PCI_DEV(entries[i].bdf), in fdt_fixup_pcie_ls()
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| A D | pcie_ecam_generic.c | 54 (PCI_DEV(bdf) << 11) | (PCI_FUNC(bdf) << 8) | offset; in pci_generic_ecam_conf_address() 57 PCI_DEV(bdf), PCI_FUNC(bdf), offset); in pci_generic_ecam_conf_address()
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| A D | pcie_mediatek.c | 148 val = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), in mtk_pcie_config_address() 201 writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_DEV(devfn), bus), in mtk_pcie_hw_rd_cfg() 231 writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_DEV(devfn), bus), in mtk_pcie_hw_wr_cfg() 270 if ((PCI_BUS(bdf) == 0) && (PCI_DEV(bdf) == port->slot)) in mtk_pcie_find_port() 273 if (PCI_BUS(bdf) != 0 && PCI_DEV(bdf) == 0 && in mtk_pcie_find_port() 274 PCI_DEV(pplat->devfn) == port->slot) in mtk_pcie_find_port() 667 slot = PCI_DEV(addr.phys_hi); in mtk_pcie_probe() 706 slot = PCI_DEV(addr.phys_hi); in mtk_pcie_probe_v2()
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| A D | pci-rcar-gen2.c | 100 slot = PCI_DEV(d); in rcar_gen2_pci_addr_valid() 115 return priv->cfg_base + (PCI_DEV(bdf) >> 1) * 0x100 + (offset & ~3); in get_bus_address() 123 reg = PCI_DEV(bdf) ? RCAR_AHBPCI_WIN1_DEVICE : RCAR_AHBPCI_WIN1_HOST; in setup_bus_address()
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| A D | pcie_dw_common.c | 176 if ((PCI_BUS(d) == first_busno) && (PCI_DEV(d) > 0)) in pcie_dw_addr_valid() 178 if ((PCI_BUS(d) == first_busno + 1) && (PCI_DEV(d) > 0)) in pcie_dw_addr_valid() 208 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_dw_read_config() 252 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_dw_write_config()
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| A D | pcie_dw_mvebu.c | 224 if ((PCI_BUS(d) == first_busno) && (PCI_DEV(d) > 0)) in pcie_dw_addr_valid() 226 if ((PCI_BUS(d) == first_busno + 1) && (PCI_DEV(d) > 0)) in pcie_dw_addr_valid() 256 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_dw_mvebu_read_config() 303 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_dw_mvebu_write_config()
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| A D | pci_mvebu.c | 155 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in mvebu_pcie_read_config() 157 if (!mvebu_pcie_valid_addr(pcie, busno, PCI_DEV(bdf), PCI_FUNC(bdf))) { in mvebu_pcie_read_config() 187 addr = PCI_CONF1_EXT_ADDRESS(busno, PCI_DEV(bdf), PCI_FUNC(bdf), offset); in mvebu_pcie_read_config() 234 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in mvebu_pcie_write_config() 237 if (!mvebu_pcie_valid_addr(pcie, busno, PCI_DEV(bdf), PCI_FUNC(bdf))) { in mvebu_pcie_write_config() 278 addr = PCI_CONF1_EXT_ADDRESS(busno, PCI_DEV(bdf), PCI_FUNC(bdf), offset); in mvebu_pcie_write_config() 609 if (slot == PCI_DEV(devfn) && type == rtype) { in mvebu_get_tgt_attr()
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| A D | pcie_fsl.c | 39 if (PCI_BUS(bdf) == dev_seq(bus) && (PCI_DEV(bdf) > 0 || PCI_FUNC(bdf) > 0)) in fsl_pcie_addr_valid() 42 if (PCI_BUS(bdf) == (dev_seq(bus) + 1) && (PCI_DEV(bdf) > 0)) in fsl_pcie_addr_valid() 63 PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && in fsl_pcie_read_config() 70 PCI_DEV(bdf), PCI_FUNC(bdf), in fsl_pcie_read_config() 108 PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && in fsl_pcie_write_config() 113 PCI_DEV(bdf), PCI_FUNC(bdf), in fsl_pcie_write_config()
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| A D | pci_sh7751.c | 83 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset); in sh7751_pci_read_config() 97 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset); in sh7751_pci_write_config()
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| A D | pci-aardvark.c | 365 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_advk_read_config() 367 if (!pcie_advk_addr_valid(pcie, busno, PCI_DEV(bdf), PCI_FUNC(bdf))) { in pcie_advk_read_config() 451 reg = PCIE_ECAM_OFFSET(busno, PCI_DEV(bdf), PCI_FUNC(bdf), (offset & ~0x3)); in pcie_advk_read_config() 549 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_advk_write_config() 553 if (!pcie_advk_addr_valid(pcie, busno, PCI_DEV(bdf), PCI_FUNC(bdf))) { in pcie_advk_write_config() 607 reg = PCIE_ECAM_OFFSET(busno, PCI_DEV(bdf), PCI_FUNC(bdf), (offset & ~0x3)); in pcie_advk_write_config()
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| A D | pcie_rockchip.c | 110 unsigned int dev = PCI_DEV(bdf); in rockchip_pcie_rd_conf() 111 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); in rockchip_pcie_rd_conf() 137 unsigned int dev = PCI_DEV(bdf); in rockchip_pcie_wr_conf() 138 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); in rockchip_pcie_wr_conf()
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| A D | pcie_xilinx.c | 64 unsigned int dev = PCI_DEV(bdf); in pcie_xilinx_config_address()
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| A D | pcie_uniphier.c | 137 if ((PCI_BUS(bdf) != first_busno) || (PCI_DEV(bdf) > 1)) in uniphier_pcie_addr_valid() 155 if ((PCI_BUS(bdf) == seq) && !PCI_DEV(bdf)) { in uniphier_pcie_conf_address() 161 | PCIE_ATU_DEV(PCI_DEV(bdf)) in uniphier_pcie_conf_address()
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| A D | pci_msc01.c | 36 unsigned int dev = PCI_DEV(bdf); in msc01_config_access()
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| /u-boot/arch/x86/cpu/ |
| A D | pci.c | 23 outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR); in pci_x86_read_config() 42 outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR); in pci_x86_write_config()
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| A D | irq.c | 262 rt->rtr_devfn = (PCI_DEV(priv->bdf) << 3) | PCI_FUNC(priv->bdf); in create_pirq_routing_table() 278 i, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf), in create_pirq_routing_table() 283 PCI_BUS(pr.bdf), PCI_DEV(pr.bdf)); in create_pirq_routing_table() 286 PCI_BUS(pr.bdf), PCI_DEV(pr.bdf)); in create_pirq_routing_table() 307 fill_irq_info(priv, slot, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf), in create_pirq_routing_table()
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| /u-boot/board/theadorable/ |
| A D | theadorable.c | 369 ven_id, dev_id, PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in pcie_get_link_speed_width() 418 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in do_pcie_test() 434 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); in do_pcie_test()
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| /u-boot/arch/x86/cpu/intel_common/ |
| A D | generic_wifi.c | 75 address = (PCI_DEV(bdf) << 16) | PCI_FUNC(bdf); in generic_wifi_fill_ssdt()
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